[FAQ] DRA821U-Q1: How to enable RGMII2 on CPSW5G for TI EVM using the Native Linux Driver?

Out of the box, TI SDK enables QSGMII interface from CPSW5G using the EXENETXPANEVM.
The RGMII2 interface is only supported through the J7EXPCXEVM. To enable RGMII2, the following device tree modifications are required.

Device Tree Changes:

1. Modify the overly file (k3-j7200-evm-quad-port-eth-exp.dtso) to enable RGMII interface on CPSW5G.
k3-j7200-evm-quad-port-eth-exp.dtso

2. Add referenced pin mux node from above overlay in k3-j7200-common-proc-board.dts file

3. Configure appropriate delay parameters in the device tree to match PHY timing requirements.


Reference Test Logs:

1. Ping test:

Successful ping responses confirm the basic connectivity and interface functionality.



2. Iperf test:

Ieprf test confirms the link is running at 1Gbps speed, verifying full RGMII2 throughput capability.



For more details on RGMII clock delay configuration, refer to the TI FAQ: How to configure RGMII clock delay on J7 devices.