Other Parts Discussed in Thread: DP83867IR, SYSCONFIG
1. TI SK-AM62P-LP board PHY strapping attempted fast-linkup without success
1) Referring to the PHY IC (DP83867IR) Datasheet, modified the strap resistor on the PCB board
2) Modifying MAC-related settings in Sysconfig
(link : https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1567696/sk-am62p-lp-link-up-failed-without-auto-negotiation-by-strap/6036613)
3) The link-up test of PC ↔ AM62P-LP Board and "AM62P-LP board A" ↔ "AM62P-LP board B" was conducted, but the link-up time was much lower than expected
: 2.4 to 2.7 seconds for initial power application, 200 to 300 ms for SW reset (reset button)
2. Attempt to link-up by downloading the example of link-up with auto-negotiation disabled on two Infineon C-2D-6M boards, which is equipped with the same PHY IC (64-pin for Infineon b'd, 48-pin model for TI AM62P-LP) as SK-AM62P-LP board
: Apply methods such as fast link-up setting, removing forced link-up, minimizing unnecessary extended register access during PHY initialization, fast-retain off, and reducing wait time after PHY register write to code
→ Changing various settings takes approximately 24-30ms to link up on average
3. I use the same IC, but there is a big difference between TI board and link-up time
→ Questions arise whether options such as Sysconfig are being applied correctly
(Sysconfig ver. 1.25.0, MCU SDK+ ver. 11_00_00_16, CCS ver. 20.3.0)
4. I would like to ask you if there is a way to get specific support from TI for that matter
