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[FAQ] J7200XSOMXEVM: How to enable RGMII interface from both CPSW2G and CPSW5G from U-boot

Part Number: J7200XSOMXEVM
Other Parts Discussed in Thread: J7EXPCXEVM

How to enable RGMII Interface from both CPSW instances (CPSW2G from MCU Domain, CPSW5G from Main Domain) supported from J7200.

  • By default, only CPSW2G from the MCU domain is enabled at U-Boot.
    The GESI Expansion board (J7EXPCXEVM) enables the RGMII interface of CPSW5G connecting to J7200XSOMEVM.

    To enable both CPSW2G and CPSW5G RGMII interfaces during U-Boot, the following steps must be performed.

    1) Enable the CPSW5G interface nodes and pinmux configuration for the RGMII interface in the device tree.
    2) Map the compatible string (ti,j7200-cpswxg-nuss) of the CPSW5G node to the CPSW driver.
    3) Enable the MIDO pins connections to DP83867 PHYS on GESI Expansion using GPIO pin-hog from the device tree.
    4) Enable the CONFIG_PHY_TI_DP83867 for configuring the RGMII delay at the PHY side using the TI DP83867 driver.
    5) Invoke CPSW driver for CPSW5G during misc_init_r , along with the driver for the GPIO Expander

    A patch containing all the above changes is attached for reference.

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/6232.patch_5F00_to_5F00_enable_5F00_cpsw2g_5F00_cpsw5g_5F00_rgmii_5F00_u_2D00_boot.patch