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AM335x DDR3 Damping Resistors

Kika
Intellectual 420 points 



Hi,


In the AM335x EVM circuit diagram the, DDR2 signals are connected to damping resistors.
Will it be similar in case of DDR3?
We could find the details in the guidelines mentioned in the datasheet.
Do we have to use dmaping resistor for DDR3 signals?


Regards.
  • 0
    TI__Guru 63155 points

    DDR3 routing guidelines were added to the latest data manual released about two weeks ago.

    Please make sure you are using the latest data manual that includes the DDR3 routing guidelines.

    The address/control signals should have far-end parallel terminated to a VTT supply which is a source and sink supply operating at half the voltage of VDDS_DDR.  The data/strobe signals should be terminated with On Device Termination (ODT).  Series termination resistors should not be used with DDR3.

     

    Regards,

    Paul

  • 0 in reply to peaves
    Prodigy 20 points

    Hi,

    Paul: Are the damping resistors mandatory for DDR2 at 266Mhz (max. clock. Am I wrong?)? Have you experienced without them?

    We have experienced with another processor (ARM9) and same Micron DDR2 family IC working right at 200Mhz: 2 layers, 15-20mm lenght on high speed nets. Now we're begining to design a custom board with AM335x and this point is important for us.

    Thanks. Regards,

    Manuel.

  • 0 in reply to Manuel Martinez Guillen
    TI__Guru 63155 points

    The series termination resistors are recommended on the CK and ADDR_CTRL net class signals when the DDR is operated at 200MHz or higher.  However, it may be possible to get the DDR2 interface to operate properly at 266MHz without these resistors in some conditions.

    In most cases a PCB design that follows the data sheet recommendations will yield a functional DDR interface without performing a signal integrity analysis.   Performing a detailed signal integrity analysis based on a specific PCB design provides the best design method to insure the interface will operate as expected.  

    Therefore, you should perform a detailed analysis based on your PCB design without the series termination resistors to determine if there is significant margin to allow the DDR interface to operate under these conditions.

    Regards,
    Paul

  • 0 in reply to peaves
    Prodigy 20 points

    I've been learning about signal integrity analysis. The pitty is that my CAE (Altium Designer) seems don't be as good for this task as for routing (my guess). Also I've got strange results since you recommended me to put series termination resistors to the ADDR&CRTL signals and in fact my analysis shows me few overshoot/undershoot in the unidirectional signals and differential pairs (from the order of 20mV) and considerables values for DQ signals (around 300mV). I will keep on studing this matter...

    Only one more question pls! Why BeagleBone's designers used DDR2 instead of DDR3 when the second one is cheaper from time ago?

    Regards,
    Manuel.