OMAP4460 - How to redirect UART3 interrupt to Cortex-M3?

Mirela

Other Parts Discussed in Thread: 4460, TL16C750, NDKTCPIP, AM3703, TL16C550C, TL16C450, TL16C554, CCSTUDIO

Hi,

I want to execute code on Cortex-M3 and receive chars from UART3. I'm using Pandaboard ES.
In specification for the OMAP4460 I can see that it is possible, but I cannot find how should UART3 be configured
to generate interrupt to the Cortex-M3.
Thanks in advance for any help,

Mirela

over 13 years ago

0 Manuel Contreras over 13 years ago

TI__Genius 10545 points

Mirela;

That information is in Chapter 5 for OMAP4 4460 TRM, it is the DSP Subsystem who can access the External interrupts, one of them is the UART3 from boot sequence.

Other sections to read are

5.3.2.6 INTC

5.3.7 Interrupt Requests

5.4.1 DSP Boot

5.4.4 Interrupt Management

but it is good practice to read full chapter.

To get OMAP4 4460 TRM go to http://www.ti.com/product/OMAP4460 and see section User Guides and look for OMAP4460 Multimedia Device ES1.x Public TRM Version T (Rev. T)

Then you can use IVA_HD to connect and use Cortex-M3 like depicted in 6.1.1 IVA-HD Integration, for Cortex-M3 chapter they mention 64 external interrupts but they are for wake up calls, they are not external interrupts like the ones described for external peripherals.

In section 5.3.2.7 "Other DSP Reference Documents" you can find other helpful documents to work with the DSP Subsystem.

0 Mirela over 13 years ago in reply to Manuel Contreras

Prodigy 240 points

Thanks for the reply, but that doesn't help a lot. Also, link to the spec Rev. T doesn't work.

I'm not using DSP neither IVAHD.

For the Cortex-M3 interrupt controller, MM_IRQ_29 is the interrupt which should be generated when UART3_IRQ line is active

(OMAP4460-Rev.S: pg.3450).

How can I configure UART3 to activate UART3_IRQ line when char is received?

Thanks,

Mirela

0 Manuel Contreras over 13 years ago in reply to Mirela

TI__Genius 10545 points

I ask an apology for providing wrong prior information, I am reading the information just shared now.

By following the information you provided and reading chapters 5, 6, 7, 17, 23.

Chapter 23 mentions about UART3 and how it is mentioning how it is interconnected to other systems, it is in 23.3.1 UART/IrDA/CIR Overview, and a resume of it can be find in Table 23-144. Hardware Requests.

then moving to chapter 17, Figure 17-1. Interrupt Controllers Overview, TRM explains IRQs for M3 in "17.3.3 Interrupt Requests to Cortex-M3 MPU INTC"

Information copied from 4460 TRM.

MM_IRQ_29 UART3_IRQ UART3 UART3 interrupt(4)

(4) Shared with DSP and Cortex-A9 MPU INTCs

Section "17.4.2 Cortex-M3 MPU INTC Functional Description" mentions some restrictions about the use of peripherals' IRQs and redirects for more information to http://infocenter.arm.com/help/index.jsp

and one note found in between

NOTE: All Cortex-M3 MPU subsystem internal interrupts are edge interrupts, except the one
generated from the MMU (XLATE_MMU_FAULT), which is level interrupt.

then moving to chapter 7, in Table 7-18. WUGEN_MEVT0 it makes reference to the MIRQ29 where 0 disables interrupt and 1 enables it. Other references are to Table 7-23. CORTEXM3_RW_PID1 and Table 7-25. CORTEXM3_RW_PID2 and mention that address is stored by the BIOS code, then reference goes to ARM page mentioned before to M3 TRM.

and the handle and different types of interrupts are mentioned in 23.3.4.5 Interrupt Requests.

0 Mirela over 13 years ago in reply to Manuel Contreras

Prodigy 240 points

Thank you very much for the reply.

I have followed OMAP4460 Rev.S, pg. 4495: Protocol, Baud Rate, and Interrupt Settings to configure UART3.

Here is the code that I'm using to initialize UART3:

void init_uart()
{
int tmp;
int efr;

// 1. Disable UART to access the UARTi.UART_DLL and UARTi.UART_DLH registers:
tmp = read((int *)UART_MDR1);
write(tmp | 0x7, (int *)UART_MDR1);

// 2. Switch to register configuration mode B to access the UARTi.UART_EFR register:
write(0x00BF, (int *)UART_LCR);

// 3. Enable access to the UARTi.UART_IER[7:4] bit field:
efr = read((int *)UART_EFR);
write(efr | ENHANCED_EN, (int *)UART_EFR);

// 4. Switch to register operational mode to access the UARTi.UART_IER register:
write(0x00, (int *)UART_LCR);

// 5. Clear the UARTi.UART_IER register (set the UARTi.UART_IER[4] SLEEP_MODE bit to 0 to change
// the UARTi.UART_DLL and UARTi.UART_DLH registers). Set the UARTi.UART_IER register value to
// 0x0000.
write(0, (int *)UART_IER);

// 6. Switch to register configuration mode B to access the UARTi.UART_DLL and UARTi.UART_DLH
// registers:
write(0x00BF, (int *)UART_LCR);

// 7. Load the new divisor value:
write(0x1a, (int *)UART_DLL);
write(0x00, (int *)UART_DLH);

// 8. Switch to register operational mode to access the UARTi.UART_IER register:
write(0, (int *)UART_LCR);

// 9. Load the new interrupt configuration (0: Disable the interrupt; 1: Enable the interrupt):
write(0x1, (int *)UART_IER);

// 10. Switch to register configuration mode B to access the UARTi.UART_EFR register:
write(0x00BF, (int *)UART_LCR);

// 11. Restore the UARTi.UART_EFR[4] ENHANCED_EN value saved in Step 3a.
tmp = read((int *)UART_EFR);
tmp &= ~ENHANCED_EN;
write(tmp | (efr & ENHANCED_EN), (int *)UART_EFR);

// 12. Load the new protocol formatting (parity, stop-bit, character length) and switch to register operational
// mode:
// Set the UARTi.UART_LCR[7] DIV_EN bit to 0.
// Set the UARTi.UART_LCR[6] BREAK_EN bit to 0.
// 8 bits, No parity, 1 stop bit
write(0x3, (int *)UART_LCR);

// 13. Load the new UART mode:
write(0x0, (int *)UART_MDR1);
}

Obviosly I am missing something, because I receive weird char on terminal.

But, the interrupt to the UART3 is generated correctly.

Can you see something obvious what I am missing?

Is there any public example available, where I can see how UART should be configured?

I find some code in u-boot, but it haven't helped me a lot.

Thanks,

Mirela

0 Manuel Contreras over 13 years ago in reply to Mirela

TI__Genius 10545 points

I can think next possible check points or ideas;

1. Check that other side of the communication matches the configuration used, one of the causes of corrupted Rx values could be that for example that speed is not correct or that parity bit is not correctly configured. I know it could be difficult to happen but some systems has parity N and it means odd.

2. Try doing a UART reset described in 23.3.5.1.1.1 Software Reset and configure the FIFO/DMA/Disabled 23.3.5.1.1.2 FIFOs and DMA Settings, it could be using some value that is set by the system, it has more meaning with next point. Considering 7.4.2 Cortex-M3 MPU INTC Functional Description note about M3 ans SYSRESETREQ.

3. When handling the interrupt can you try disabling UART interrupts and one time it is serviced enable the interrupt again, just like a check? one section explains how it is handled when FIFO is disabled and how the RHR is used.

4. it is not mentioned if you are using FIFO or DMA or Nothing, and either if you are checking the status register first or not described in 3.3.4.8.1.3.5 Error Detection and 23.3.4.8.1.3.6 Overrun During Receive. then it could be an overflow or a parity error that is happening, the point to read 23.3.4.6 FIFO Management.

I don't know about a source code for this, there is this other post

http://e2e.ti.com/support/omap/f/849/p/213312/753987.aspx

and a old post about UART, possibly not related but contains some points to check.

http://e2e.ti.com/support/omap/f/849/p/188151/678563.aspx

Chapter "23.3.5.1 UART Programming Model" describes how to work with the UART, you are not using XON/XOFF software control, not using HW control CTS/DTS, and you are disabling sleep/wakeup UART features and focusing only in Rx. To avoid the limitations for M3 and UART you could try using it from A9 to discard some limitation from M3.

0 Manuel Contreras over 13 years ago in reply to Manuel Contreras

TI__Genius 10545 points

There is a note in OMAP4 TRM in UART section:

"The UART is functionally compatible with the TL16C750 UART and earlier designs such as the
TL16C550."

http://www.ti.com/product/tl16c750#feature

and it provides a link to next files,

http://www.ti.com/lit/ds/slls191c/slls191c.pdf

http://www.ti.com/lit/ml/sllt153d/sllt153d.pdf

and this file contains code to run TL16C750 it is both ASM and C.

http://www.ti.com/lit/an/bpra049/bpra049.pdf

next file is for a DSP device but the UART theory includes some comments for initialization and FIFO that are not in TRM, it could help in some way.

http://www.ti.com/lit/ug/spru997c/spru997c.pdf

And in

http://www.ti.com/lit/ug/spru030a/spru030a.pdf

it mentions that in "TCP/IP Stack Software Platform Porting kit" you can find

<SRC\HAL>
TCP/IP stack HAL source code
<TIMER> <USERLED> Source code to User LED Driver
<ETH_STUB> Source code to Ethernet Stub Driver (when not using Ethernet)
<ETH_DM642> Source code to DM642 Ethernet MAC Driver
<ETH_C6455> Source code to C6455 Ethernet MAC Driver
<ETH_MX> Source code to Macronix MX98728 Ethernet MAC Driver
<ETH_SMSC> Source code to SMSC LAN91C111 Ethernet MAC Driver
<SER_STUB> Source code to Serial Stub Driver (when not using Serial)
<SER_TI750> Source code to Texas Instruments TL16C750 Serial UART Driver
<SER_TI752> Source code to Texas Instruments TL16C752 Dual Serial UART Driver

and in next file that was found by looking for "TCP/IP Stack Software"

http://www.ti.com/lit/ml/sprt356c/sprt356c.pdf

that points to download link

https://www-a.ti.com/downloads/sds_support/targetcontent/NDK/index.html

there you can find some Installers and tar files for specific processors.

and the last link that makes reference to this matter is

http://www.ti.com/tool/ndktcpip

this one contains some reference to wiki, NDK licensing, TI E2E community and more reading.

0 Mirela over 13 years ago in reply to Manuel Contreras

Prodigy 240 points

Thank you very much for your quick reply!

I work on this problem, I hope to get back with the results.

0 Manuel Contreras over 13 years ago in reply to Mirela

TI__Genius 10545 points

I tried downloading ndk_2_21_01_38.zip from last shared link but I cannot find an UART code in this package. In bpra049.pdf there is some code to check.

Another thing to try is to contact TI representative and ask them if this driver code is available somewhere or in a previous version of NDK.

0 Mirela over 13 years ago in reply to Manuel Contreras

Prodigy 240 points

It was the problem with my FIFO configuration.

I've fixed it!

Thank you for your help,

Mirela

0 Gopi Ravada over 13 years ago in reply to Mirela

Prodigy 100 points

Yes,

Its good example to see.

For me, i am using OMAP3703 processor.

I want to know the steps to configure hardware flowcontrol. There is steps in data sheet of AM3703. It's looks like above .

But if u have any steps to configure hardware flow control on this.Please post me those steps.

Thanks,

-Gopi

0 Gopi Ravada over 13 years ago in reply to Gopi Ravada

Prodigy 100 points

Ya i checked the data sheet of yours ,23.3.5.1.2 section same procedure.

Could you please share me flow control code stuff.

Thanks,

-Gopi

0 Gopi Ravada over 13 years ago in reply to Gopi Ravada

Prodigy 100 points

the code above for 3 Protocol, Baud Rate, and Interrupt Settings. So if u have code for Hardware flow control pls share me those steps.

-Gopi

0 Manuel Contreras over 13 years ago in reply to Gopi Ravada

TI__Genius 10545 points

I found it,

from TI.com search using 16550

http://www.ti.com/lit/ds/slls191c/slls191c.pdf

"The TL16C750 is a functional upgrade of the TL16C550C asynchronous communications element (ACE),
which in turn is a functional upgrade of the TL16C450."

In this same document you can find the diagrams and instructions for flow control, both SW and HW.

from here to

http://www.ti.com/lit/ds/symlink/tl16c554.pdf

where you can find the information to the specific device

then searching in NDK there is a note "The serial client and serial router examples are no longer provided with the NDK and NSP."

http://www.ti.com/lit/ug/spru523h/spru523h.pdf

this document is for NDK version 2.2, then searching for the version 2.0.

in the NDK document it is mentioned a download site that leads to next link

http://processors.wiki.ti.com/index.php/Category:NDK

in this link it is the download site

http://processors.wiki.ti.com/index.php/Source_code_for_the_NDK

and then by selecting NDK version 2.0 there is a .exe to install the src directory mentioned for serial code.

http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/ndk/2_00_00/index_FDS.html

one time installed next directory location shows the serial source code for tl16c752

c:/CCStudio_v3.3/ndk_2_0_0/packages/ti/ndk/src/hal/evmdm642/ser_ti752

the issue in the past was the I was looking download file for version 2.2 or newer versions, source code is available only in 2.0.

I am mentioning the full path because it contains and explains some important documents.

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OMAP4460 - How to redirect UART3 interrupt to Cortex-M3?