TMS320C54 Clock Crystal specs

1. what is the clock xtal specs for TMS320C54CSTGGU. I am looking for frequency stability and drift in ppm?

2. JTAG TRST- will this signal reset the IC, or should this be AND'ed with the IC reset signal ?

Hi,

Sorry but the documentation does not specify crystal frequency stability requirements.

It does say that "If DSP clock is used to clock DAA (for on-chip DAA, this is the case), clock jitter needs to be very small, in order to enable robust modem
operation. For this reason, it is recommended to use crystals without internal PLL, because otherwise crystal’s internal PLL in combination with DSP’s PLL leads to high jitter." - http://www.ti.com/lit/ug/spru029a/spru029a.pdf

"The crystal should be fundamental-mode and parallel resonant, with a maximum effective series resistance specification of 30 O, power dissipation of 1 mW, and a load capacitance of 10 pF."  - http://www.ti.com/lit/ds/sprs187c/sprs187c.pdf

I would find out what crystal spec was used with the TMS320C54CST Evaluation Module from Spectrum Digital, Inc. (not on their website anymore).

Hope this helps.
Mark

Mark,

One more question-

If I am not using the C1A I/O, do I need to supply 5V for the C1A5V pin?

Hi,

Sorry I do not know, but I am concerned about the note at the bottom of Figure 3-63 TMS320C54CST Hardware Reference Design:

"†D5 is required when using the optional charge pump. It is also required in systems where the 5-V supply can be more than 0.5 V below the 3.3-V supply during power-up or power-down." - http://www.ti.com/lit/ds/sprs187c/sprs187c.pdf

D5 (Schottky) from 3.3V supply to 5V supply... so maybe C1A5V needs at least 3.3V?

Regards,
Mark

Hithesh said:

2. JTAG TRST- will this signal reset the IC, or should this be AND'ed with the IC reset signal ?

TRST‡ - IEEE standard 1149.1 test reset. TRST, when high, gives the IEEE standard 1149.1 scan system control of the operations of the device. If TRST is driven low, the device operates in its functional mode, and the IEEE standard 1149.1 signals are ignored. Pin with internal pulldown device.

‡ Although this pin includes an internal pulldown resistor, a 470-Ω external pulldown is required. If the TRST pin is connected to multiple DSPs,
a buffer is recommended to ensure the VIL and VIH specifications are met.

Refer to 3.19.5 Hardware Reference Design in http://www.ti.com/lit/ds/sprs187c/sprs187c.pdf

...where R47 = 470Ω, 0603, 5%, 1/16 W

Regards,
Mark

Mark,

Thanks. for the reply. 

I think I will get rid of the 5v supply.