while testing C6421 ROM bootloader in NAND mode I observed unexpected behavior related to NAND ECC:
- single bit error in page data (1/4 of the 2kB page, 512B to be precise) area was corrected (that is OK),
- single bit error in page spare area (in ECC value itself) caused boot failure or booting from next block (if there was a boot copy in next block)
Could anyone confirm this issue? In my test I was damaging bit by programming page second time with 0xFFs value and single bit cleared in place of one that was set in undamaged page - it should be reproduceable.
Exact markings on tested processor:
Tested with 1Gbit NAND, device ID = 0xF1 (2kB page).
Could you point me to any other documentation besides spraak5b? I find it not precise in this area, conditions on which bootloader skips block are not documented.