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Issues using Code Composer to Initialize DDR3 with AM3892

Other Parts Discussed in Thread: AM3892

We are using CCS 6.0.1.00040 and a XDS200 USB Emulator pod to communicate to a AM3892 on a custom board. We're currently attempting to initialize our DDR3 interface (EMIF 0 only) using the procedure described here: http://processors.wiki.ti.com/index.php/DM816x_C6A816x_AM389x_DDR3_Init. (We are using Micron MT41J256M16HA-107 DDR3 arranged in a 256Mx32 configuration.) We've obtained the required trace length measurements and plugged them into the RadioSeed spreadsheet to obtain the seed values, and have plugged in all of the timing information into the spreadsheet to set the register initialization values in the GEL file. However, when we load the TI816x_ddr3.gel file and attempt to run the DDR3_400MHZ_doall script, CCS begins to report errors and we can no longer access the target. It appears that the problem occurs in EMIF4P_Init() when the ASR bit in the SDRRCR register is set. After this occurs, we have to power-cycle the target board to get CCS back into a stable state and reestablish communications with the target. We took an oscilloscope to the JTAG chain, which currently only includes the emulator and the processor, and saw constant traffic coming out of both parts after the ASR bit is set.

Here is the console output that is generated when the script is executed:

CortexA8: GEL Output:
Connecting Target...
CortexA8: GEL Output: Connecting Target... Done.

CortexA8: Output:     Device type is GP
CortexA8: Output:     DM816x Main PLL Init is in Progress, Please wait .....
CortexA8: Output:     DM816x Main PLL Init is Done .....
CortexA8: Output:     DM816x DDR PLL Init is in Progress for 400 MHz DDR Clock, Please wait .....
CortexA8: Output:     DM816x DDR PLL Init is Done .....
CortexA8: Output:     DM816x DDR2/3 PRCM Init is in progress .....
CortexA8: Output:     DM816x DDR2/3 PRCM Init is Done .....
CortexA8: Trouble Writing Memory Block at 0x4c000010 on Page 0 of Length 0x4: (Error -2130 @ 0x4C000010) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.507.0)
DDR3_400MHZ_doall() cannot be evaluated.
Target failed to write 0x4C000010
    at *((unsigned int *) (0x4C000000+0x10))=(unsigned int) (0x10000000|SDREF) [TI816x_DDR3.gel:230]
    at EMIF4P_Init(0x0AAAE51B, 0x206B7FDA, 0x001F867F, (0x10000C30&0xfffffff), 0x61A03833, 0x0000010B) [TI816x_DDR3.gel:1474]
    at DM816xDDRPLL_400() [TI816x_DDR3.gel:1210]
    at DDR3_400MHZ_doall()

I have attached the GEL file that we are using. Any help would be very much appreciated.


Thanks,

Cory Pendergraft

TI816x_DDR3.gel