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[DA8xx] Power-Off sequence

Naoki Kawada
Guru 19890 points

Other Parts Discussed in Thread: DA8XX

Hello,

My customer has a question about da8xx power off sequence. Datasheet says :

Power-Off Sequence
The power supplies can be powered-off in any order as long as the 3.3V supplies do not remain powered
with the other supplies unpowered.

IO supply (3.3V) needs to be powered down faster than core supply (1.2V).
At the power down event, IO supply starts unpowered, and core supply follows it.
During these transitions, core supply could be smaller voltage than IO supply.
My customer wants to clarify whether this is allowed or not.

Also, this is not related to power sequence, but my customer has an another question about 
Reset Electrical Data Timings in datasheet. it seems there is no spec in /RESET rising/falling transition time.
Do you have any specs for this ?

Best Regards,
Kawada

  • 0
    TI__Guru** 116100 points
    Hi,
    Could you please refer to the following Ti user guide.
    www.ti.com/.../getliterature.tsp;fileType=pdf
  • 0 in reply to Titusrathinaraj Stalin
    Guru 19890 points

    First of all, the manual you suggested is not for Primus, but for Freon. 
    Our question may be re-written as below:

    DA8xx datasheet says*
     The power supplies can be powered-off in any order as long as the 3.3V supplies do not remain powered with  the other supplies unpowered.

    The above descriptions in red/blue are not so clear. 
    - 3.3V supplies do not remain powered ... How much voltage should not be remaining ?
    - the other supplies unpowered. .... How much voltage could be regarded as unpowered ?
    Can you clarify this ? Please note my customer does not use any 1.8V power line. Core(1.2V) and IO (3.3V) only.

    Also, please dont forget to answer to the question related to /RESET.

    Best Regard,
    Kawada

  • 0 in reply to Naoki Kawada
    TI__Mastermind 43660 points
    Hello Kawada,

    The statement in the datasheet describes like there is no specific recommendation for power off sequence, but you need not to keep the 3.3V on when the other rails like CVDD, RVDD etc., I would suggest you to switch off the 3.3V rail prior to the other rails.

    Regarding RESET timing, there is no specification available for rise/fall time. I believe meeting the specifications in section 5.5.3 Reset Electrical Data Timings is good enough.

    Regards,
    Senthil
  • 0 in reply to Senthilkumar Srinivasan
    Guru 19890 points

    Hello Senthil,

    Thanks for your reply.

    As for /RESET, I'll try to talk with the customer.

    But regarding power-off sequence, I need to ask the same question again.
    Datasheet says that user can power-off in any order, but IO line should not be remaining powered with other supplies unpowered.
    As your suggestion, this implies IO power line should be switched off faster than Core power line. Yes, I agree with your point.
    But how about the following scenario ? Is this allowed power down sequence ?


    Best Regards,
    Kawada

  • 0 in reply to Naoki Kawada
    TI__Mastermind 43660 points
    Hello Kawada,

    Since the IO voltage level is very less when the core voltage (very lesser than threshold) switches off, it could be acceptable. However i would recommend the customer to decrease the IO voltage ramp down time in such a way that it would completely switch off when you attempt to switch off core voltage.

    Regards,
    Senthil
  • 0 in reply to Senthilkumar Srinivasan
    Guru 19890 points
    Hello Senthil,

    Thanks for your reply again.
    As for increasing ramp down ratio for IO power, i agree with you.
    In order to follow your suggestions, we would need to clarify the next question:
    Do you have any guidelines for the threshold values for both power lines to switch off the internal logic ?
    If you had the guideline, the customer might be able to tune the ratio.
    Of course, I understand your point, the safer scenario is that IO supply is 0V before unpowering core.

    Sorry to ask you much. It would be so appreciated to give us the information.

    Best Regards,
    Kawada
  • 0 in reply to Naoki Kawada
    TI__Mastermind 43660 points
    Hello Kawada,

    There is no specific guidelines available for threshold values of the power lines to switch off the internal logic. As i stated above, the requirement is to make IO supply completely switch off to 0V before switch off the core supply.

    Regards,
    Senthil
  • 0 in reply to Senthilkumar Srinivasan
    Guru 19890 points

    Hello Senthil,

    Hmm... ok, I'll try to talk the customer with your suggestions.

    Best Regards,
    Kawada

  • 0 in reply to Naoki Kawada
    TI__Mastermind 43660 points
    Hello Kawada,

    Please help us to close this thread if you do not have further clarification.

    Regards,
    Senthil
  • 0 in reply to Senthilkumar Srinivasan
    Guru 19890 points
    Hello Senthil,

    I talked with the customer.
    I want to close thread, but the I got a final question.
    Actually, this is not a question, but we just want to know your comments for /RESET transition time.

    Here is the actual transition time on their target board.
    　　Tr=1.43us/10%-90%
    　　Tf=1.10us/10%-90%

    Do you think the customer should have more faster transitions?
    Datasheet says 10ns transition time may be required to the clocks, but I think this requirement is not applicable to /RESET pin.
    Of course, I'll never commit your answers to the customer because the transition time is not being characterized.
    We just want to know your thought for this .

    Best Regards,
    Kawada
  • 0 in reply to Naoki Kawada
    TI__Mastermind 43660 points
    Hello Kawada,

    Yes, as you said we have not characterized the transition time of the RESET signal and hence there is no recommendation on this. However it would be quite good as long as they meet the RESET timing specifications. I would recommend you to get the faster transition time as much as possible, it may improve the noise immunity on the RESET signal.

    The 10ns transition time is required for clock signal and it is not applicable for RESET signal.

    Regards,
    Senthil
  • 0 in reply to Senthilkumar Srinivasan
    Guru 19890 points
    Hello Senthil,

    Ok, I'll close this thread.

    Again, thank you so much for all your helps.
    Naoki, Kawada