DM8127 csi2 hang-up at REGISTER CSI2_complexio_cfg [29] RESET_DONE

qiang guo70

Other Parts Discussed in Thread: SYSCONFIG, DMVA3

hi，all:
problem 1:
i test the function of csi2 on dm8127 , get a problem:
when i completely init DM8127 csi2 , the bit of CSI2_complexio_cfg [29] RESET_DONE still 0;

list of register:
//csi2 register

[m3vpss ] (csi2_revision) 55041000:30
[m3vpss ] (csi2_sysconfig) 55041010:1000
[m3vpss ] (csi2_sysstatus) 55041014:1
[m3vpss ] (csi2_irqstatus) 55041018:0
[m3vpss ] (csi2_irqenable) 5504101c:18
[m3vpss ] (csi2_ctrl) 55041040:29a869
[m3vpss ] (csi2_dbg_h) 55041044:0
[m3vpss ] (reserved) 55041048:1b
[m3vpss ] (reserved) 5504104c:49054321
[m3vpss ] (csi2_complexio_cfg) 55041050:4b054321
[m3vpss ] (csi2_complexio_irqs) 55041054:0
[m3vpss ] (reserved) 55041058:0
[m3vpss ] (csi2_short_packet) 5504105c:0
[m3vpss ] (csi2_complexio_irqenable) 55041060:0
[m3vpss ] (reserved) 55041064:0
[m3vpss ] (csi2_dbg_p) 55041068:0
[m3vpss ] (csi2_timeing) 5504106c:7fffc1d6
[m3vpss ] (csi2_ctx_ctrl1_0) 55041070:1008d
[m3vpss ] (csi2_ctx_ctrl2_0) 55041074:12c
[m3vpss ] (csi2_ctx_dat_ofst_0) 55041078:0
[m3vpss ] (csi2_ctx_dat_ping_addr_0) 5504107c:0
[m3vpss ] (csi2_ctx_dat_pong_addr_0) 55041080:0
[m3vpss ] (csi2_ctx_irqenable_0) 55041084:0
[m3vpss ] (csi2_ctx_irqstatus_0) 55041088:0
[m3vpss ] (csi2_ctx_ctrl3_0) 5504108c:c8

// csi2 phy register
[m3vpss ] (register0) 55041170:52b
[m3vpss ] (register1) 55041174:c002e10e
[m3vpss ] (register2) 55041178:ff

//iss register
[m3vpss ] (iss_hl_revison) 55040000:40000103
[m3vpss ] (iss_hl_hwinfo) 55040004:3
[m3vpss ] (iss_hl_sysconfig) 55040010:3c
[m3vpss ] (reserved) 5504001c:0
[m3vpss ] (iss_hl_irqstatus_raw_0) 55040020:20000
[m3vpss ] (iss_hl_irqstatus_0) 55040024:0
[m3vpss ] (iss_hl_irqenable_set_0) 55040028:1
[m3vpss ] (iss_hl_irqenable_clr_0) 5504002c:1
[m3vpss ] (iss_ctrl) 55040080:3
[m3vpss ] (iss_clkctrl) 55040084:f0000017
[m3vpss ] (iss_clkstat) 55040088:f0000017
[m3vpss ] (iss_pm_status) 5504008c:28a2

// isp register
[m3vpss ] (isp5_sysconfig) 55050010:21
[m3vpss ] (isp5_ctrl) 5505006c:c0fff1

problem 2:
when i init csi2,i find some registers is not found on dm8127 ,and it is found on omap ic;
List :
to fully initialize the csiphy,perform the following steps:
1. (vi) set the control_camer_rx[17:16] camerarx_csi21_cammode !!!!!!! this register is not found;
2.(c)
control_core_pad0_csi21_dx4_pad_csi21_dy41 !!!!!! padconfig register is not found;

The iss pdf is :dm8127 iss spruhl6-- january 2013; dm38x,dm8127,and dmva3/4 imaging subsystem(iss);

problem3:
we produce about 100 cameras ，about 30% found this problem：

UBIFS error (pid 246): ubifs_check_node: bad CRC: calculated 0x35fe3c8a, read 0x20106fc4
UBIFS error (pid 246): ubifs_check_node: bad node at LEB 103:102400
UBIFS error (pid 246): ubifs_scanned_corruption: corruption at LEB 103:102400
UBIFS error (pid 246): ubifs_scan: LEB 103 scanning failed

i test the yaffs2 filesys，but the problem is still ,

about the 3 problem ,can you give me some advices ,our company is producing now , thanks everybody!

over 8 years ago

0 Pavel Botev over 8 years ago

TI__Guru**** 170625 points

Hello,

Do you use IPNC RDK?

Regarding issue 3, try the below:

- run MTD tests to verify your NAND flash is not damaged
- use BCH8 ECC
- disable sub pages while creating UBI image

Please also use the latest version of the linux kernel code base:
http://arago-project.org/git/projects/?p=linux-ipnc-rdk-dm81xx.git;a=shortlog;h=refs/heads/ipncrdk_psp_dm81xx_kernel

See also the below links:
e2e.ti.com/.../1328376
e2e.ti.com/.../415426
e2e.ti.com/.../211477
e2e.ti.com/.../843238

processors.wiki.ti.com/.../Mtdutils
processors.wiki.ti.com/.../UBIFS_Support

BR
Pavel

0 qiang guo70 over 8 years ago in reply to Pavel Botev

Prodigy 130 points

thanks for your reply i do it now ,can you reply the other 2 problem? thsnks.

0 Pavel Botev over 8 years ago in reply to qiang guo70

TI__Guru**** 170625 points

qiang guo70 said:
can you reply the other 2 problem?

I need first answer of the question I have asked to you in my previous post.

BR
Pavel

0 qiang guo70 over 8 years ago in reply to Pavel Botev

Prodigy 130 points

sorry ,i answer the question now.

i use rdk3.5,but i copy csi2 of the rdk3.8 to the rdk3.5 ,but it is not ok still.

would you give me some advice?

0 Pavel Botev over 8 years ago in reply to qiang guo70

TI__Guru**** 170625 points

Do you mean IPNC RDK or DVR RDK?

BR
Pavel

0 qiang guo70 over 8 years ago in reply to Pavel Botev

Prodigy 130 points

it is IPNC RDK3.5

0 Pavel Botev over 8 years ago in reply to qiang guo70

TI__Guru**** 170625 points

I will notify the IPNC RDK team for help.

BR
Pavel

0 qiang guo70 over 8 years ago in reply to Pavel Botev

Prodigy 130 points

thanks , Looking forward to your reply .The problem has been bothering me for a long time.

0 Anand Kulkarni71405 over 8 years ago in reply to qiang guo70

TI__Expert 8920 points

Hi,

Does the system hang in 'csi2_wait_phy_reset()' function?

Then pl. check your sensor configuration,CSI2 receiver lane configurations and data format in the '..\ti_tools\iss_03_80_00_00\packages\ti\psp\iss\core\src\iss_comp.c' file.

Pl. note that CSI2 receiver will come out of the reset when it starts receiving the clock and data even with the default configuration.

regards,

Anand

0 qiang guo70 over 8 years ago in reply to Anand Kulkarni71405

Prodigy 130 points

thanks for your reply,.

the system hangs in 'csi2_wait_phy_reset' function.

i test the follow function:

1: the sensor send csi clock and csi data already;

2: the register is list ahead;

i have the 3 problem:

Int32 csiDDRspeedMhz = 400;

what is the clock, is the sensor csi clock?

2: iss datasheet has some register ,i cannt find it. is it affect csi reset ?

to fully initialize the csiphy,perform the following steps:
1. (vi) set the control_camer_rx[17:16] camerarx_csi21_cammode !!!!!!! this register is not found;
2.(c)
control_core_pad0_csi21_dx4_pad_csi21_dy41 !!!!!! padconfig register is not found;

3 i used the iss_comp.c code, Need other settings for the reset ?

the iss_comp.c code list follow:

#ifdef USE_MIPI_MODE

config_params->iss_config->vp_device = IPIPE_VP_DEV_CSIA;
Int32 csiDDRspeedMhz = 400;
csi2_cfg_t pIssCsi2Config;
CSI2_DEVICE_T dev = CSI2_DEVICE_A;
csi2_ctx_transcode_cfg_t transcode;
retval = csi2_init();
if (retval != CSI2_SUCCESS)
{
return retval;
}
retval = csi2_open();
Vps_printf("2222222\n");
//Enable CSI module clocks
iss_module_clk_ctrl(ISS_CSI2A_CLK, ISS_CLK_ENABLE);
*((int *)0x55040010) = 0x3c; //sysconfig
*((int *)0x55040080) = 0x3 ; //ctrl
*((int *)0x55040084) = 0xf0000017 ; //clkctrl

//Reset the CSI2 receiver (globlal reset) and wait for RESET_DONE.
retval |= csi2_reset(dev, 0);
Vps_printf("%s:%d,retval=%d\n",__FUNCTION__,__LINE__,retval);
pIssCsi2Config.master_standby_mode = CSI2_NO_STANDBY; // CSI2_SMART_STANDBY;
pIssCsi2Config.auto_idle_ocp_clock = CSI2_FREE_RUNNING; // CSI2_AUTO_IDLE;
pIssCsi2Config.context_set_flag |= (0x01u << 0);
pIssCsi2Config.ctx_cfg_ptr_array[0] = &csi2ImageCtxDefaultParams;
pIssCsi2Config.control = &csi2CtrlDefaultParamsVpOnly;
(pIssCsi2Config.ctx_cfg_ptr_array[0])->vp_force = CSI2_ENABLED_BIT;

pIssCsi2Config.complexio_cfg_1 = &csi2ComplexioCfgDefaultParams;
pIssCsi2Config.complexio_cfg_2 = &csi2ComplexioCfgDefaultParams;

csi2ComplexioCfgDefaultParams.data1_position = CSI2_POSITION_2;
csi2ComplexioCfgDefaultParams.data2_position = CSI2_POSITION_3; //CSI2_NOT_USED;//
csi2ComplexioCfgDefaultParams.data3_position = CSI2_POSITION_4; //CSI2_NOT_USED; //
csi2ComplexioCfgDefaultParams.data4_position = CSI2_POSITION_5; //CSI2_NOT_USED; //

pIssCsi2Config.complexio_irq_enable_1 = 0x00000000u;
pIssCsi2Config.complexio_irq_enable_2 = 0x00000000u;

pIssCsi2Config.timing_io = &csi2TimingDefaultParams;

// set proper timing on CSI D-PHY
pIssCsi2Config.physical = &csi2PhysicalDefaultParams;
pIssCsi2Config.physical->phy_00 = ((((12500 * csiDDRspeedMhz + 1000000 / 2) / 1000000) - 1) & 0xFF) << 8;
pIssCsi2Config.physical->phy_00 |= ((((90000 * csiDDRspeedMhz + 1000000 / 2) / 1000000) + 3) & 0xFF);

retval = csi2_config(dev, &pIssCsi2Config);
// *((int *)0x55041050) |= 0x88888;
//*((int *)0x5504106C) |= 0x7fff61ff;
Vps_printf("status:%x\n",*((int *)0x55041050));
Task_sleep(2);
//Start Streaming
/*#ifdef IMGS_MICRON_AR0330
Iss_Ar0330EnableStreaming();
#elif defined IMGS_SONY_IMX140
Iss_IMX140_EnableStreaming();
#endif*/
csi2_wait_phy_reset();

regards,

gxqiang;

0 qiang guo70 over 8 years ago in reply to qiang guo70

Prodigy 130 points

Then pl. check your sensor configuration,CSI2 receiver lane configurations and data format :
i check the lane configuration:
(csi2_complexio_cfg) 55041050:4b054321 4lanes
i check the lane configuration:
(csi2_ctx_ctrl2_0)55041074:12c CSI2_RAW12_VP

is there other registers affect the reset? can you give me some advices, i checked it together.

thanks

0 user1403821 over 8 years ago in reply to qiang guo70

Prodigy 120 points

hi...qiang guo70
In my case,I also have the same problem.
My Csi-interface hang-up at csi2_wait_phy_reset() too.

to TI Employee
Do you have any suggestions

regards,

Rock