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C6727B Flash boot clarification

Other Parts Discussed in Thread: SPRC203, OMAP-L132

Hi,

I've been reading the SPRAA69D (Using c672x Bootloader) and pretty much all the c6727 boot related discussions here.

I need some clarifications as I can't find it mentioned or documented.  I'm looking at examples (SPRC203) particularly the gpioAsAddr project.

So here are my questions:

1) Looking at load map, the secondary bootloader's entry point, TIBootStrap is at 0x10000020.  How does this work when the on-board BL jumps and starts execution of secondary BL at offset 0x04?

2) Where exactly is the AIS loaded?  How is it flashed along with the gpioAsAdddr.out?  I don't understand from reading where _fetchAis() retrieves the AIS instructions.

Any clarification is greatly appreciated.

  • Hi

    When you use the AIS Gen tool, it will prefix some headers ( 32 bytes) on top of the secondary bootloader binary image and that image is called as AIS formatted image.

    For more details on the format of the AIS, please visit : "SPRAB41D" section 4.

    Snippet from Section 4.

    Application Image Script (AIS) Boot

    AIS is a format of storing the boot image. Apart from the HPI and two NOR-boot modes ,
    all boot modes supported by the OMAP-L132/L138 bootloader use AIS for boot purposes.
    AIS is a binary language, accessed in terms of 32-bit (4-byte) words in little endian format. AIS starts with
    a magic word (0x41504954) and contains a series of AIS commands, which are executed by the
    bootloader in sequential manner. The Jump & Close (J&C) command marks the end of AIS.

    Each AIS command consists of an opcode, optionally followed by one or more arguments, followed by
    optional data.

    To understand the flow, please visit :

  • Thanks. It's a nice detail about AIS, but this still does not clarify things for me.

    The C6727 on-chip bootloader requires the image to be in AIS format if booting from I2C or SPI. That part is clear and properly documented. But with Parallel Flash boot mode, the on-chip BL merely copies first 1024 bytes from flash to memory, sets PC to offset 0x4 and hands off execution to user (which typically is the secondary bootloader).

    The example mentioned above, gpioAsAddr, incorporates both the secondary BL (which is the one that understands AIS) and the application code in single .out. So if this entire image is in AIS format (including the secondary BL), how does it work? How can secondary BL execute to load and decode the rest? The on-chip BL does not interpret this image; just merely points to offset 0x4 and leave it to whatever is loaded. Again, looking at load map and the ascii AIS, there's nothing in 0x10000004.

    I would think that there should be a normal executable image that resides on the first 1024 bytes of flash. Then the user application in AIS format residing somewhere else. But this doesn't seem to be the case for this example.

    Am I understanding this wrong? Please explain in details as I'm truly confused. Thanks for the help!