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RTOS/TMS320C6678: Getting started information on TMS320C6678 software

Rahul Prabhu
Guru** 114410 points
Part Number: TMS320C6678
Other Parts Discussed in Thread: CCSTUDIO

Tool/software: TI-RTOS

I am posting these questions on behalf of some friends who are looking for some information regarding TMS320C6678 devices and software.

We are working on architecting a new digital board with TI’s TMS320C6678 DSP chip and a few FPGAs. It would be great if we could get TI’s support on the following :

 

  1. Best development tool to use – evaluation board comes with Code Composer Studio v5 but we are planning on using v6. There are quite a few differences between the two versions and we would like to know which one is better suited for our project.

2. Better understanding of the boot process on the new chip.

3.Memory partitioning – get TI’s thoughts on the memory requirements for our application and how to best utilize the chip to accommodate that. 

Regards,

Rahul

  • 0
    TI__Guru** 114410 points

    Rahul Prabhu said:
    1. Best development tool to use – evaluation board comes with Code Composer Studio v5 but we are planning on using v6. There are quite a few differences between the two versions and we would like to know which one is better suited for our project.

    CCSTUDIO-KEYSTONE Code Composer Studio (CCS) Integrated Development Environment (IDE) for Multicore Processors...

    www.ti.com
    <!-- ccstudio css --><!-- ccstudio css --> <p> <script src="www.ti.com/.../lightbox.js" type="text/javascript"></script> </p> <!-- end Lightbox2 --><!-- ccstudio css end --> <p><a href="http://processors...

    The evaluation module was created in 2009-2010 time frame and is still shipping with the older software. The current recommended software for starting development using C6678 device is Processor SDK RTOS which is supported using CCS6.1.3. The supported version of CCS may change based on new versions of Processor SDK RTOS so please check Release notes before installing the appropriate version. the Release notes also provides information regarding the peripheral drivers supported on the device.

    Rahul Prabhu said:
    2. Better understanding of the boot process on the new chip.

    The DSP bootloader operations have been jointly described in DSP Bootloader USer guide and the data manual . The EVM has some quirks in how it implements the booting process that has been described here:

     

    Another great resource, we have created for all things bootloader is the Keystone Bootloader FAQ where you can find response and examples that were created based on frequently asked questions on E2E.

     

    Rahul Prabhu said:
    3.Memory partitioning – get TI’s thoughts on the memory requirements for our application and how to best utilize the chip to accommodate that. 

    The memory map summary for the chip is described in the C6678 datamanual. In general all the DSP cores have their own L1 and L2 private memory space and we also have 4 MB of shared onchip MSMC memory. If your application also requires external DDR memory, you have the ability to use EMIF peripheral to interface wtih 2GB DDR3 memory devices and with some MPAX settings extennd it upto 8GB as we have a 36 bit address to access DDR memory.

    If you can provide more specifics about the application requirements, we may be able to make some recommendations regarding memory partitioning.

    Hope this helps.

    Regards,

    Rahul