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OMAP-L138: Audio Processing throughput capabilities question

Part Number: OMAP-L138
Other Parts Discussed in Thread: OMAPL138, PCM1802, AUDK2G, PCM1864, 66AK2G02

Hello,

I am in the beginning phases of designing the OMAP-L138 into a new product and have some questions regarding it's performance potential.

We need to do basic processing and delay (highpass/lowpass filtering, up to 3rd order) on 16in/16out channels at 192kHz.  Is this something that should reasonably be within the capabilities of the DSP?  Is there a method for determining this without implementing the entire system (i.e. some calculations based upon the published specs)?

The datasheet also mentions that the McASP is designed to support 192kHz/32bit audio on each of its serializers transmitting/receiving simultaneously. Should it also be possible to transmit at this rate on 16in/24out using the TDM mode, provided the appropriate data clocks can be generated?

Thanks,

Jeff

  • Jeff,

    Some clarification for your usecase is required. Do you plan to use all 16 McASP serializer pins? 8 input and 8 output serializer with each serializer configured for stereo input (2 channels). The reason I ask is that we need to understand what bit rate is required to meet your requirement.

    If you plan to use all of the McASP serializer pins then this should be possible as you would need a bit rate of 12.228 Mhz (192 * 32* 2 ) . If you plan to use only 2 or 4 serializer then you may not be able to meet the timing spec. A good way for you to find this out would be to simulate your McASP clock using OMAPL138 clocking spreadsheet.
    processors.wiki.ti.com/.../AM18xx

    Provided EDMA is doing all of the data movement and the clocks can be derived this seems feasible.

    Another data point is that on OMAPL137/DA830 using PCM1802 codec we have tested  audio input upto 96 Khz using the McASP driver and multichannel daughter card.  

    and at 192 Khz sampling using AUDK2G and 66AK2G02 with PCM1864 Codec.

     

    Let me confirm that internally and get back to you on this issue.


    Regards,
    Rahul

  • The plan is to use every available serializer/pin on the device as a stereo IIS pin (8 pins in, 8 pins out). The datasheet said the peripheral should be able to handle that. For this configuration, the concern lies with the DSP's processing capability, as we may need to be running 16 3rd order filters at a time.

    The McASP throughput question arises when we consider using some of the serializers in a multi-slot (let's say 4) format. As we will already have 24.576MHz clocks in our system, it seems that we could potentially have more than 16 audio channels in/16 channels out. Looking at the datasheet, it looks like bit clocks up to 40MHz are allowed, so as long as the EDMA can keep up, I think it'll work. I should have known there was a timing spec for the peripheral...

    Excellent! Another useful answer. Thank you!