PRU-SWPKG: Sharing data between ARM and PRU

Puneeth Bandikatla

Part Number: PRU-SWPKG
Other Parts Discussed in Thread: AM4378

Hi,

I am trying to look at ways to share / transfer data between ARM and PRU (Or in between PRUs). I have looked at a few examples and it looks like I have to use a DRAM that is shared by PRU and the ARM. I had a look at the explanation on this page(http://processors.wiki.ti.com/index.php/PRU_Linux-based_Example_Code#PRU_mem1DTransfer) but I can't find a complete example anywhere. The page pointed to by the above wiki doesn't have any examples.

What I don't understand is how would the PRU and ARM know where to read or write the data? How do I convey that information between the two?

Thanks,
Puneeth

over 5 years ago

0 Biser Gatchev-XID over 5 years ago

TI__Guru**** 393215 points

The software team have been notified. They will respond here.

0 Jason Reeder over 5 years ago in reply to Biser Gatchev-XID

TI__Expert 8060 points

Puneeth,

Using the TI Processor Linux SDK, the supported method to transfer data between the PRU and ARM (running Linux) is RPMsg. Please see the following wiki pages that explain RPMsg as well as how to run your first RPMsg example:
processors.wiki.ti.com/.../PRU-ICSS_Remoteproc_and_RPMsg
processors.wiki.ti.com/.../RPMsg_Quick_Start_Guide

The PRU Software Support Package is the current software package the TI provides to use while running Linux. It is included in the 'example-applications' folder of the Linux Processor SDK installation but can also be found here:
git.ti.com/.../

Here is the path to the out-of-box example that is provided in the Linux Processor SDK that showcases PRU<->ARM communication:
git.ti.com/.../PRU_RPMsg_Echo_Interrupt0

Jason Reeder

0 Puneeth Bandikatla over 5 years ago in reply to Jason Reeder

Intellectual 715 points

Thanks Jason,
I was able to run the example and the PRU was 'echo'ing the message back to stdin.
Now I am switching from AM335x to AM4378. I have had a look at the migration guide and a few questions posted here on e2e. What I could see was that the old PRUSS UIO interface is no longer supported and the way to deal with the PRU is through RPMsg drivers.
1. On the beaglebone I was able to program, compile and run PRU code without using another computer. Is it no longer possible to do this?
2. How do I now start and halt the PRU programmatically through ARM? Should I write to the /sys/class/remoteproc/remoteprocX/status file everytime?
3. How do I set up device tree if I do not intend to use the GEL files?

Thanks again for the help.

0 Jason Reeder over 5 years ago in reply to Puneeth Bandikatla

TI__Expert 8060 points

Puneeth,

1. The development on the AM437x should be very similar to that of the AM335x (as far as using the Linux Processor SDK is concerned). I'm not sure what you mean by using another computer.

2. If you are using the latest Linux Processor SDK that is based on the 4.9 kernel (SDK v4.0.0.4) then yes, you need to use the /sys/class/remoteproc/remoteprocX/state file to start and stop the PRUs

3. Default device trees for all TI EVMs are provided in the kernel sources that are given with the TI Linux Processor SDK (~/ti-processor-sdk-linux-am335x-evm-04.00.00.04/board-support/linux-4.9.28+gitAUTOINC+eed43d1050-geed43d1050/arch/arm/boot/dts). Gel files are not necessary when running Linux and loading the PRUs using the Remoteproc Linux driver.

The PRUSS UIO interface is supported only on the BeagleBoard Community forums using their Debian distribution.

Jason

0 Puneeth Bandikatla over 5 years ago in reply to Jason Reeder

Intellectual 715 points

Jason,

So I am trying to run the simple PRU_gpioToggle example. I intend to use pr0_pru1_gpo[9] pin to toggle the gpio pin(connected to an led).

The steps I am following:

1. In the am437x-sk-evm.dts file I added the following under &am43xx-pinmux section:

	pru0_1_default: pru_pruss01_pins_default {
		pinctrl-single,pins = <
			0xec ( PIN_OUTPUT | MUX_MODE5 ) /* (A24) dss_ac_bias_en.pr0_pru1_gpo[9] */
		>;
	};

The device tree compiles without errors. I used the TI pinmux tool for this.

2. Compiled PRU_gpioToggle.c file and copied the resulting .out file to /lib/firmware/pru on the board. Updated the symbolic link am437x-pru0_1-fw to point to the compiled file.

am437x-pru0_1-fw -> /lib/firmware/pru/PRU_gpioToggle.out

3. echo start > /sys/class/remoteproc/remoteproc4/state

4. The dmesg output says that pru1 is powered up and fw image is booted.

However, things are still not working, the gpio is not getting toggled. Is there something I am missing?

Thanks,
Puneeth

P.S. The PRU RPMsg example is working fine, so I am guessing the kernel has proper support for the PRUSS.

0 Puneeth Bandikatla over 5 years ago in reply to Puneeth Bandikatla

Intellectual 715 points

Another thing I forgot to mention is the way I am toggling the GPIO pins:

	/* Toggle GPO pin[9] */
	gpio = 1 << 9;

	/* TODO: Create stop condition, else it will toggle indefinitely */
	while (1) {
		__R30 ^= gpio;
		__delay_cycles(100000000);
	}

I hope this method, similar to how I used to do it for Beaglebone, works here as well.

Puneeth

0 Jason Reeder over 5 years ago in reply to Puneeth Bandikatla

TI__Expert 8060 points

Puneeth,

You may be running into a pinmux conflict with the dss_ac_bias_en function of the A24 pin. Look at the end of the 'dss_pins' node in the am437x-sk-evm.dts file that you referenced. You'll notice that the pin is being configured for mux mode 0.

This type of conflict will not stop the device tree from compiling without errors, but it will cause a pinmux conflict during the boot process. Once the board is booted you can type 'dmesg | grep pinctrl' to see if any pinmux conflicts are being reported.

If you are not using the display subsystem (DSS) and would like to free those pins for another purpose, you can change the status in the '&dss' node of the device tree from 'okay' to 'disabled'.

Jason Reeder

0 Puneeth Bandikatla over 5 years ago in reply to Jason Reeder

Intellectual 715 points

So I disabled dss entirely and now I am trying to do the same, but things are still not working. dmesg | grep pinctrl doesn't report anything fishy. Something else that I should be doing?

0 Puneeth Bandikatla over 5 years ago in reply to Puneeth Bandikatla

Intellectual 715 points

Jason,

I am trying to do the following.

a. Toggle DSS_BIAS pin using /sys/class/gpio interface.

1. Disable dss in the am437x-sk-evm.dts file. Enable gpio2 subsystem.
At this point I also tried to put the pin in MUX_MODE7 in the am43xx_pinmux section. But if I do this I can't toggle the gpio pins, so all I did was enable the gpio2 system and left it that.

2. No conflicts reported in dmesg.

3. echo 89 > /sys/class/gpio/export
echo out > /sys/class/gpio/gpio89/export
echo 1 > /sys/class/gpio/gpio89/value

4. Things work fine. I am using 89 because it is the 25th pin of gpio2. (2 * 32) + 25 = 89.

b. Toggle same pin using PRU

1. Disable dss and add the following lines.

pinctrl-single,pins = <
0xec ( PIN_OUTPUT | MUX_MODE5 ) /* (A24) dss_ac_bias_en.pr0_pru1[9] */
>;

2. No conflicts reported in dmesg

3. Now I look under /sys/kernel/debug/pinctrl/44e10800.pinmux/pingroups. Output:

group: pruss0_pru1_pins
pin 59 (PIN59) <-- (Why is this pin number 59? Shouldn't it be 89?)
4. Things look fine and I link the .out file against am437x-pru0_1-fw file and then I echo start in /sys/class.../remoteproc4
5. dmesg out looks all right but I the pin is not getting toggled.

So I am wondering whether there is some thing else that I should be checking as I all the usual checks aren't reporting any faults.

Thanks,
Puneeth

0 Jason Reeder over 5 years ago in reply to Puneeth Bandikatla

TI__Expert 8060 points

Puneeth,

"Why is this pin number 59? Shouldn't it be 89?"

No, the pin numbering in that debugfs is 0 based and corresponds to the order that the ctrl_conf register (where the mux mode is set) appears in the memory map. So, ctrl_conf_dss_ac_bias_en is at offset 0xec (0xec = 236, 236 / 4 = 59). You can see the list of pins and their numbering in the '44e10800.pinmux/pins' file.

In the '44e10800.pinmux/pins' file you will also see the address for the register that the pinmux is trying to configure, 0x44e108ec in your case. Can you use the devmem2 command to confirm the value being written to the ctrl_conf_dss_ac_bias_en register (devmem2 0x44e108ec) and then post it here?

Jason Reeder

0 Puneeth Bandikatla over 5 years ago in reply to Jason Reeder

Intellectual 715 points

Here is the output of devmem2 0x44e108ec command:

/dev/mem opened.
Memory mapped at address 0xb6f0f000.
Read at address 0x44E108EC (0xb6f0f8ec): 0x08050007

Doesn't change on starting or stopping the PRU.

0 Jason Reeder over 5 years ago in reply to Puneeth Bandikatla

TI__Expert 8060 points

Puneeth,

Based on the devmem2 output that you posted, the dss_ac_bias_en pin is being configured as gpio2_25 (because the mux mode bits (bits 3:0) in the register are 7) instead of pr0_pru1_gpo9 (which would be a 5 in the mux mode bits, which is what you are trying to set using the device tree).

Are you sure that your device tree modifications are being included in your compiled DTB file? This could either be caused by making the modification to the wrong dts or dtsi file, or by not including the correct dtsi file.

Are you sure that you are using the updated DTB file during the boot process? Have you placed your newly built dtb file into the /boot/ directory and renamed it correctly to be used during the next boot?

Can you post your dts/dtsi files here?

Jason Reeder

0 Puneeth Bandikatla over 5 years ago in reply to Jason Reeder

Intellectual 715 points

Hi Jason,

I am pasting my dts file below. However, I think the dts file is being loaded by the boards as `pingroup` shows that PIN59 is under pruss0_pru1_pins group. Isn't that dictated by the dts file?

"Are you sure that you are using the updated DTB file during the boot process? Have you placed your newly built dtb file into the /boot/ directory and renamed it correctly to be used during the next boot?"

Does it need to have a specific name? I am definitely placing it in the /boot/ directory.

/*
 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/* AM437x SK EVM */

/dts-v1/;

#include "am4372.dtsi"
#include <dt-bindings/pinctrl/am43xx.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	model = "TI AM437x SK EVM";
	compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";

	aliases {
		display0 = &lcd0;
	};

	chosen {
		stdout-path = &uart0;
	};

	/* fixed 32k external oscillator clock */
	clk_32k_rtc: clk_32k_rtc {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <32768>;
	};

	lcd_bl: backlight {
		compatible = "pwm-backlight";
		pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
		brightness-levels = <0 51 53 56 62 75 101 152 255>;
		default-brightness-level = <8>;
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "AM437x-SK-EVM";
		simple-audio-card,widgets =
			"Headphone", "Headphone Jack",
			"Line", "Line In";
		simple-audio-card,routing =
			"Headphone Jack",	"HPLOUT",
			"Headphone Jack",	"HPROUT",
			"LINE1L",		"Line In",
			"LINE1R",		"Line In";
		simple-audio-card,format = "dsp_b";
		simple-audio-card,bitclock-master = <&sound_master>;
		simple-audio-card,frame-master = <&sound_master>;
		simple-audio-card,bitclock-inversion;

		simple-audio-card,cpu {
			sound-dai = <&mcasp1>;
		};

		sound_master: simple-audio-card,codec {
			sound-dai = <&tlv320aic3106>;
			system-clock-frequency = <24000000>;
		};
	};

	matrix_keypad: matrix_keypad0 {
		compatible = "gpio-matrix-keypad";

		pinctrl-names = "default";
		pinctrl-0 = <&matrix_keypad_pins>;

		debounce-delay-ms = <5>;
		col-scan-delay-us = <5>;

		row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH		/* Bank5, pin5 */
				&gpio5 6 GPIO_ACTIVE_HIGH>;	/* Bank5, pin6 */

		col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH		/* Bank5, pin13 */
				&gpio5 4 GPIO_ACTIVE_HIGH>;	/* Bank5, pin4 */

		linux,keymap = <
				MATRIX_KEY(0, 0, KEY_DOWN)
				MATRIX_KEY(0, 1, KEY_RIGHT)
				MATRIX_KEY(1, 0, KEY_LEFT)
				MATRIX_KEY(1, 1, KEY_UP)
			>;
	};

	leds {
		compatible = "gpio-leds";

		pinctrl-names = "default";
		pinctrl-0 = <&leds_pins>;

		led0 {
			label = "am437x-sk:red:heartbeat";
			gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 0 */
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};

		led1 {
			label = "am437x-sk:green:mmc1";
			gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 1 */
			linux,default-trigger = "mmc0";
			default-state = "off";
		};

		led2 {
			label = "am437x-sk:blue:cpu0";
			gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 2 */
			linux,default-trigger = "cpu0";
			default-state = "off";
		};

		led3 {
			label = "am437x-sk:blue:usr3";
			gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 3 */
			default-state = "off";
		};
	};

	lcd0: display {
		compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
		label = "lcd";

		pinctrl-names = "default";
		pinctrl-0 = <&lcd_pins>;

		backlight = <&lcd_bl>;

		enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;

		panel-timing {
			clock-frequency = <9000000>;
			hactive = <480>;
			vactive = <272>;
			hfront-porch = <2>;
			hback-porch = <2>;
			hsync-len = <41>;
			vfront-porch = <2>;
			vback-porch = <2>;
			vsync-len = <10>;
			hsync-active = <0>;
			vsync-active = <0>;
			de-active = <1>;
			pixelclk-active = <1>;
		};

		port {
			lcd_in: endpoint {
				remote-endpoint = <&dpi_out>;
			};
		};
	};
};

&am43xx_pinmux {
	matrix_keypad_pins: matrix_keypad_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0xa4c, PIN_OUTPUT | MUX_MODE7)	/* gpio5_13.gpio5_13 */
			AM4372_IOPAD(0xa50, PIN_OUTPUT | MUX_MODE7)	/* spi4_sclk.gpio5_4 */
			AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE7)	/* spi4_d0.gpio5_5 */
			AM4372_IOPAD(0xa58, PIN_INPUT | MUX_MODE7)	/* spi4_d1.gpio5_5 */
		>;
	};

	leds_pins: leds_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0xa28, PIN_OUTPUT | MUX_MODE7)	/* uart3_rxd.gpio5_2 */
			AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE7)	/* uart3_txd.gpio5_3 */
			AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7)	/* uart3_ctsn.gpio5_0 */
			AM4372_IOPAD(0xa34, PIN_OUTPUT | MUX_MODE7)	/* uart3_rtsn.gpio5_1 */
		>;
	};

	i2c0_pins: i2c0_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
			AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
		>;
	};

	i2c1_pins: i2c1_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x95c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
			AM4372_IOPAD(0x958, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
			AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
			AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
			AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
			AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
			AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
			AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
		>;
	};

	ecap0_pins: backlight_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
		>;
	};

	edt_ft5306_ts_pins: edt_ft5306_ts_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE7)	/* gpmc_wpn.gpio0_31 */
			AM4372_IOPAD(0x878, PIN_OUTPUT | MUX_MODE7)	/* gpmc_be1n.gpio1_28 */
		>;
	};

	vpfe0_pins_default: vpfe0_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
			AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
			AM4372_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_field mode 0*/
			AM4372_IOPAD(0x9bc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_wen mode 0*/
			AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
			AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
			AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
			AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
			AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
			AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
			AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
			AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
			AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
			AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
			AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
		>;
	};

	vpfe0_pins_sleep: vpfe0_pins_sleep {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			AM4372_IOPAD(0x9b8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			AM4372_IOPAD(0x9bc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
			AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
		>;
	};

	clkout1_pin: pinmux_clkout1_pin {
		pinctrl-single,pins = <
			0x270 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* XDMA_EVENT_INTR0/CLKOUT1 */
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
			AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2)	/* mii1_txclk.rmii1_tclk */
			AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
			AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
			AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
			AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd0.rgmii1_td2 */
			AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd1.rgmii1_td3 */
			AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2)	/* mii1_rxclk.rmii1_rclk */
			AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
			AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
			AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
			AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd2 */
			AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd3 */

			/* Slave 2 */
			AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
			AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
			AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
			AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
			AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
			AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
			AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
			AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2)	/* gpmc_a1.rgmii2_rtcl */
			AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
			AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
			AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
			AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
			/* Slave 1 reset value */
			AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)

			/* Slave 2 reset value */
			AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0)			/* mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	dss_pins: dss_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1)	/* gpmc ad 8 -> DSS DATA 23 */
			AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)
			AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)
			AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)
			AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)
			AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)
			AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)
			AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1)	/* gpmc ad 15 -> DSS DATA 16 */
			AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)	/* DSS DATA 0 */
			AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)
			AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)
			AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)
			AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)
			AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)
			AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)
			AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)
			AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)
			AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)
			AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)
			AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)
			AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)
			AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)
			AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)
			AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)	/* DSS DATA 15 */
			AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0)	/* DSS VSYNC */
			AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0)	/* DSS HSYNC */
			AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0)	/* DSS PCLK */
			AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0)	/* DSS AC BIAS EN */

		>;
	};

	qspi_pins: qspi_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3)	/* gpmc_csn0.qspi_csn */
			AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2)	/* gpmc_csn3.qspi_clk */
			AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3)	/* gpmc_advn_ale.qspi_d0 */
			AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3)	/* gpmc_oen_ren.qspi_d1 */
			AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3)	/* gpmc_wen.qspi_d2 */
			AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3)	/* gpmc_be0n_cle.qspi_d3 */
		>;
	};

	mcasp1_pins: mcasp1_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* mii1_crs.mcasp1_aclkx */
			AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* mii1_rxerr.mcasp1_fsx */
			AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4)	/* mii1_col.mcasp1_axr2 */
			AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* rmii1_ref_clk.mcasp1_axr3 */
		>;
	};

	mcasp1_pins_sleep: mcasp1_pins_sleep {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	lcd_pins: lcd_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
		>;
	};

	usb1_pins: usb1_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
		>;
	};

	usb2_pins: usb2_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
		>;
	};

	pruss0_pru1_pins: pruss0_pru1_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE5) 
		>;
	};

};

&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;
	clock-frequency = <100000>;

	tps@24 {
		compatible = "ti,tps65218";
		reg = <0x24>;
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-controller;
		#interrupt-cells = <2>;

		dcdc1: regulator-dcdc1 {
			/* VDD_CORE limits min of OPP50 and max of OPP100 */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912000>;
			regulator-max-microvolt = <1144000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc2: regulator-dcdc2 {
			/* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912000>;
			regulator-max-microvolt = <1378000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc3: regulator-dcdc3 {
			regulator-name = "vdds_ddr";
			regulator-min-microvolt = <1500000>;
			regulator-max-microvolt = <1500000>;
			regulator-boot-on;
			regulator-always-on;
			regulator-state-mem {
				regulator-on-in-suspend;
			};
			regulator-state-disk {
				regulator-off-in-suspend;
			};
		};

		dcdc4: regulator-dcdc4 {
			regulator-name = "v3_3d";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc5: regulator-dcdc5 {
			compatible = "ti,tps65218-dcdc5";
			regulator-name = "v1_0bat";
			regulator-min-microvolt = <1000000>;
			regulator-max-microvolt = <1000000>;
			regulator-boot-on;
			regulator-always-on;
			regulator-state-mem {
				regulator-on-in-suspend;
			};
		};

		dcdc6: regulator-dcdc6 {
			compatible = "ti,tps65218-dcdc6";
			regulator-name = "v1_8bat";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-boot-on;
			regulator-always-on;
			regulator-state-mem {
				regulator-on-in-suspend;
			};
		};

		ldo1: regulator-ldo1 {
			regulator-name = "v1_8d";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-boot-on;
			regulator-always-on;
		};

		power-button {
			compatible = "ti,tps65218-pwrbutton";
			status = "okay";
			interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
		};
	};

	at24@50 {
		compatible = "at24,24c256";
		pagesize = <64>;
		reg = <0x50>;
	};
};

&i2c1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	clock-frequency = <400000>;

	ov2659@30 {
		compatible = "ovti,ov2659";
		reg = <0x30>;
		pinctrl-names = "default";
		pinctrl-0 = <&clkout1_pin>;

		clocks = <&clkout1_mux_ck>;
		clock-names = "xvclk";
		assigned-clocks = <&clkout1_mux_ck>;
		assigned-clock-parents = <&clkout1_osc_div_ck>;

		port {
			ov2659_1: endpoint {
				remote-endpoint = <&vpfe0_ep>;
				link-frequencies = /bits/ 64 <70000000>;
			};
		};
	};

	edt-ft5306@38 {
		status = "okay";
		compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
		pinctrl-names = "default";
		pinctrl-0 = <&edt_ft5306_ts_pins>;

		reg = <0x38>;
		interrupt-parent = <&gpio0>;
		interrupts = <31 IRQ_TYPE_EDGE_FALLING>;

		reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;

		touchscreen-size-x = <480>;
		touchscreen-size-y = <272>;
	};

	tlv320aic3106: tlv320aic3106@1b {
		#sound-dai-cells = <0>;
		compatible = "ti,tlv320aic3106";
		reg = <0x1b>;
		status = "okay";

		/* Regulators */
		AVDD-supply = <&dcdc4>;
		IOVDD-supply = <&dcdc4>;
		DRVDD-supply = <&dcdc4>;
		DVDD-supply = <&ldo1>;
	};

	lis331dlh@18 {
		compatible = "st,lis331dlh";
		reg = <0x18>;
		status = "okay";

		Vdd-supply = <&dcdc4>;
		Vdd_IO-supply = <&dcdc4>;
		interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
	};
};

&epwmss0 {
	status = "okay";
};

&ecap0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&ecap0_pins>;
};

&gpio0 {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&gpio5 {
	status = "okay";
};

&mmc1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;

	vmmc-supply = <&dcdc4>;
	bus-width = <4>;
	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

&usb2_phy1 {
	status = "okay";
};

&usb1 {
	dr_mode = "otg";
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&usb1_pins>;
};

&usb2_phy2 {
	status = "okay";
};

&usb2 {
	dr_mode = "host";
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&usb2_pins>;
};

&qspi {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&qspi_pins>;

	spi-max-frequency = <48000000>;
	m25p80@0 {
		compatible = "mx66l51235l";
		spi-max-frequency = <48000000>;
		reg = <0>;
		spi-cpol;
		spi-cpha;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>;
		#address-cells = <1>;
		#size-cells = <1>;

		/* MTD partition table.
		 * The ROM checks the first 512KiB
		 * for a valid file to boot(XIP).
		 */
		partition@0 {
			label = "QSPI.U_BOOT";
			reg = <0x00000000 0x000080000>;
		};
		partition@1 {
			label = "QSPI.U_BOOT.backup";
			reg = <0x00080000 0x00080000>;
		};
		partition@2 {
			label = "QSPI.U-BOOT-SPL_OS";
			reg = <0x00100000 0x00010000>;
		};
		partition@3 {
			label = "QSPI.U_BOOT_ENV";
			reg = <0x00110000 0x00010000>;
		};
		partition@4 {
			label = "QSPI.U-BOOT-ENV.backup";
			reg = <0x00120000 0x00010000>;
		};
		partition@5 {
			label = "QSPI.KERNEL";
			reg = <0x00130000 0x0800000>;
		};
		partition@6 {
			label = "QSPI.FILESYSTEM";
			reg = <0x00930000 0x36D0000>;
		};
	};
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	dual_emac = <1>;
	status = "okay";
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
	status = "okay";
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <4>;
	phy-mode = "rgmii";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <5>;
	phy-mode = "rgmii";
	dual_emac_res_vlan = <2>;
};

&elm {
	status = "okay";
};

&mcasp1 {
	#sound-dai-cells = <0>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mcasp1_pins>;
	pinctrl-1 = <&mcasp1_pins_sleep>;

	status = "okay";

	op-mode = <0>;
	tdm-slots = <2>;
	serial-dir = <
		0 0 1 2
	>;

	tx-num-evt = <1>;
	rx-num-evt = <1>;
};

&dss {
	status = "disabled";

	pinctrl-names = "default";
	pinctrl-0 = <&dss_pins>;

	port {
		dpi_out: endpoint@0 {
			remote-endpoint = <&lcd_in>;
			data-lines = <24>;
		};
	};
};

&rtc {
	clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
	clock-names = "ext-clk", "int-clk";
	status = "okay";
};

&wdt {
	status = "okay";
};

&cpu {
	cpu0-supply = <&dcdc2>;
};

&vpfe0 {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&vpfe0_pins_default>;
	pinctrl-1 = <&vpfe0_pins_sleep>;

	/* Camera port */
	port {
		vpfe0_ep: endpoint {
			remote-endpoint = <&ov2659_1>;
			ti,am437x-vpfe-interface = <0>;
			bus-width = <8>;
			hsync-active = <0>;
			vsync-active = <0>;
		};
	};
};

&wkup_m3_ipc {
	ti,scale-data-fw = "am43x-evm-scale-data.bin";
};

&pruss_soc_bus {
	status = "okay";

	pruss1: pruss@54400000 {
		status = "okay";

		pru1_0: pru@54434000 {
			status = "okay";
		};

		pru1_1: pru@54438000 {
			status = "okay";
		};
	};

	pruss0: pruss@54440000 {
		status = "okay";

		pru0_0: pru@54474000 {
			status = "okay";
		};

		pru0_1: pru@54478000 {
			status = "okay";
			pinctrl-0 = <&pruss0_pru1_pins>;
		};
	};
};

&sgx {
	status = "okay";
};

I am also pasting the `dmesg | grep pinctrl` output:

[    0.114315] pinctrl core: initialized pinctrl subsystem
[    0.347841] pinctrl-single 44e10800.pinmux: please update dts to use #pinctrl-cells = <1>
[    0.348670] pinctrl-single 44e10800.pinmux: 199 pins at pa f9e10800 size 796

Let me know if there is anything else that you need from my end.

Thanks,
Puneeth

0 Jason Reeder over 5 years ago in reply to Puneeth Bandikatla

TI__Expert 8060 points

Puneeth,

Your device tree looks correct because as you said, you've disable the DSS pins so there should be no conflict. Also, since pruss0_pru1_pins is showing up in the pin group it seems like you DTS is being loaded.

Yes, the DTB file should have a specific name in the /boot/ directory. In the Processor Linux SDK examples, each EVM uses a different device tree name. Below is the output from the 'ls -la' command from my /boot/ directory on my AM437x GP EVM. You'll notice that I have modified the symolic link from am437x-gp-evm.dtb (the name used for the GP EVM that I am using) to point to a custom DTB that I created which modified the PRU pin muxing the same way you are.

lrwxrwxrwx 1 root root 44 Jun 28 20:27 am437x-gp-evm-hdmi.dtb -> devicetree-zImage-am437x-gp-evm-hdmi-pru.dtb
lrwxrwxrwx 1 root root 39 Jun 29 21:28 am437x-gp-evm.dtb -> devicetree-zImage-am437x-gp-evm-pru.dtb
lrwxrwxrwx 1 root root 36 Jun 29 03:42 am437x-idk-evm.dtb -> devicetree-zImage-am437x-idk-evm.dtb
lrwxrwxrwx 1 root root 45 Jun 29 03:42 am437x-idk-pru-excl-uio.dtb -> devicetree-zImage-am437x-idk-pru-excl-uio.dtb
lrwxrwxrwx 1 root root 35 Jun 29 03:42 am437x-sk-evm.dtb -> devicetree-zImage-am437x-sk-evm.dtb
lrwxrwxrwx 1 root root 36 Jun 29 03:42 am43x-epos-evm.dtb -> devicetree-zImage-am43x-epos-evm.dtb
-rw-r--r-- 1 root root 55393 Jun 28 20:26 devicetree-zImage-am437x-gp-evm-hdmi-pru.dtb
-rw-r--r-- 1 root root 55337 Jun 28 21:12 devicetree-zImage-am437x-gp-evm-hdmi.dtb
-rw-r--r-- 1 root root 54445 Jun 28 20:25 devicetree-zImage-am437x-gp-evm-pru.dtb
-rw-r--r-- 1 root root 54389 Jun 28 21:12 devicetree-zImage-am437x-gp-evm.dtb
-rw-r--r-- 1 root root 48017 Jun 28 21:12 devicetree-zImage-am437x-idk-evm.dtb
-rw-r--r-- 1 root root 52022 Jun 28 21:12 devicetree-zImage-am437x-idk-pru-excl-uio.dtb
-rw-r--r-- 1 root root 50263 Jun 28 21:12 devicetree-zImage-am437x-sk-evm.dtb
-rw-r--r-- 1 root root 51163 Jun 28 21:12 devicetree-zImage-am43x-epos-evm.dtb
-rw-r--r-- 1 root root 14082124 Jun 28 21:12 vmlinux-4.9.28-geed43d1050
lrwxrwxrwx 1 root root 25 Jun 29 03:42 zImage -> zImage-4.9.28-geed43d1050
-rw-r--r-- 1 root root 3608512 Jun 28 21:12 zImage-4.9.28-geed43d1050

Here is the output from my devmem2 command showing that mux mode 5 has been selected:

root@am437x-evm:~# devmem2 0x44e108ec
/dev/mem opened.
Memory mapped at address 0xb6ff1000.
Read at address 0x44E108EC (0xb6ff18ec): 0x00020005
root@am437x-evm:~#

Since your devmem2 command shows mux mode 7 (and your dts doesn't set the mux mode to 7 anywhere), I'm curious if you are still trying to configure the pin through the gpio sys fs interface like you were before for testing? You shouldn't be using the GPIO sys fs interface if you are trying to toggle the pin from the PRUs.

Jason Reeder

0 Puneeth Bandikatla over 4 years ago in reply to Jason Reeder

Intellectual 715 points

Hi Jason,

I tried with different PRU subsystems and PRU cores but the mode is never being set to the correct (PRU) mode. (But it works fine for something like dss!) It appears under pruss0_pru1 in the 'pingroups' section all right but devmem2 states that it is in normal gpio mode. How is that possible? Is there something that is overwriting the dtb configuration after booting?

I am using MYIR MYD-C4378 board (www.myirtech.com/list.asp)and the U-Boot on the board accesses the boot partition instead of the rootfs/boot partition for loading the zImage and the dtb. Will that be causing a problem? (And yet how is it working fine in modes other than PRU?)
Nonetheless I updated all the symbolic links to point to a custom dtb which I placed in the rootfs/boot folder.

I am not using the gpio interface when I have the dts configured for pru and I am trying to toggle it through remoteproc only.

Thanks,
Puneeth

0 Jason Reeder over 4 years ago in reply to Puneeth Bandikatla

TI__Expert 8060 points

Puneeth,

Please try adding pinctrl-names = "default"; to your pru0_1 node (shown below). I just copied and pasted your pru0_1 node into my DT and without that line my devmem2 was showing mux mode 7 (like yours). When I added that line, devmem2 showed the correct mode of 5:

pru0_1: pru@54478000 {

status = "okay";

pinctrl-names = "default";

pinctrl-0 = <&pruss0_pru1_pins>;

};

Hopefully this will resolve your issue.

Jason Reeder

0 Puneeth Bandikatla over 4 years ago in reply to Jason Reeder

Intellectual 715 points

Hi Jason,
Adding the line resolves the issue.
Thanks a lot for the help,
Puneeth

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