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AM5728: IDK DDR design

Part Number: AM5728

Hi

I was looking at ddr3 schematic section in "AM5728 IDK schematic" document, and I had read somewhere in TRM that this device supports up to 16Gb SDRAM per EMIF. There in schematic, I found that the designer has used 2 SDRAM of 4Gb capacity and wondering why he/she hasn't used 1 SDRAM with 8Gb capacity instead! Is there any reason for this? any tips or guidance would be apprecaited.