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CMOS camera module interface to TMS320DM647

Other Parts Discussed in Thread: TMS320DM647

Hello,

The TMS320DM647 has 5 video ports. I was wondering if it would be possible to connect upto 5 CMOS camera modules to this chip and aquire data in parallel.

The CMOS camera module that I have is a 5MP, with a 10 bit raw rgb output DVP port, in  addition it also includes Horizontal sync, Vertical sync, Pixel Clock amongst others.

Is it possible to interface this module to the TMS320dm647?

Regards,

Ken

 

 

  • Ken,

     

     Yes, you can connect 5 sensors and capture in parallel with clock speeds up to 80 MHz.

     

     DM647 does not have a native RGB-understanding mode, so you would need to use raw capture mode to bring the data in to the device and perform any color space conversion manually. In that mode the video port does not take H-sync and V-sync, but rather a composite CAPTURE_ENABLE signal. If your camera modules can be configured to give one of the syncs as a composite sync, that should work OK.

     

    The other thing you need to check on is the bandwidth demands on the system. DM647 uses the common EDMA controller to service the video ports along with all the system DMA requests, and everything shares a single DRAM interface. Have a look at the SoC throughput appnote (http://focus.ti.com/lit/an/spraaz9/spraaz9.pdf) to ensure your data demands will be met.

     

  • Thanks Todd,

    BTW are you talking about SAV(Start active video) and EAV(End active video)  sync sequence. I have not heard of a CAPTURE_ENABLE signal. Do camera modules generally have this signal or is this generated by some external circuitry connected to the HSYNC and the VSYNC signals?

    Rgds,

    Ken

     

  • Ken,

     No, Raw mode does not look for or interpret embedded sync codes (SAV/EAV).

     

    Capture_enable is what we call the signal. It is essentially a logical AND of the H-sync and V-sync. Capture_enable should be active during the active video periods and inactive during both H- and V-blanking periods. Your CMOS sensor may have a composite sync mode available that does this already, as many do. Often, this requires you to set a 'sync mode' register in the sensor. If your sensor does not provide this, you'll have to create it with circuitry.

  • Todd, Thanks again. Sorry for the delay in replying.

    If I'm  doing a high speed capture say at a pixel clock > 70Mhz, would the off the shelf logic gates suffice for this high speed transfer? 

    Do I have to use a CPLD to generate this signal or is these any other high speed logic gates available for this frequency?

    Regards,

    Ken

  • It depends on the timing budget you have for this interface. We have off-the-shelf LVTTL gates with as little as 3ns of prop delay and the DM647 only needs 2.5ns of setup time, so there's a good chance you can use a gate if your sensor has reasonable clock-to-Q output delay.

  • Ken Leigh said:

    The TMS320DM647 has 5 video ports. I was wondering if it would be possible to connect upto 5 CMOS camera modules to this chip and aquire data in parallel.

    The CMOS camera module that I have is a 5MP, with a 10 bit raw rgb output DVP port, in  addition it also includes Horizontal sync, Vertical sync, Pixel Clock amongst others.

    If you can live with 8 bit data, you can even connect 10 cameras because one videoport can be split into 2 8bit ports. In my application I currently use 5 8 bit inputs on 3 videoports (off topic: I think that the 2 lsb bits in a 10bit CMOS sensor will anyhow just contain noise).

    One thing you have to think about is the peripheral multiplexing. If you need PCI for example, you cannot use one Videoport since the required DM647/648 IOs are multiplexed.

    Concerning bandwidth you can also consider this post:
    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/99/p/6312/23792.aspx#23792

    Ken Leigh said:

    If I'm  doing a high speed capture say at a pixel clock > 70Mhz, would the off the shelf logic gates suffice for this high speed transfer? 

    The Videoport is specified for max. 80MHz. If you split the port into 2 8bit ports, you can get 80MHz on each sub-port. I have tested this with 5 x 8bit x 80MHz on Videoport 0.A, 0.B, 1.A, 1.B and 2.A and it seems to work.

    regards,

    Thomas