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Linux/AM3359: I2S microphone configuration

Part Number: AM3359
Other Parts Discussed in Thread: PCM5102A, PCM1864

Tool/software: Linux

I am trying to interface an I2S microphone (https://www.adafruit.com/product/3421) with BeagleBone Black. I followed the article (http://www.ti.com/lit/an/sprac97/sprac97.pdf), and able to update the device tree, and the Linux kernel as suggested in the article. 

The I2S component (for microphone) of the device tree is included as a dtsi in the main device tree source. The content of the dtsi is as below


&am33xx_pinmux {
        mcasp1_pins: mcasp1_pins {
             pinctrl-single,pins = <
                /* sink must enable receivers */
                0x1a0 0x23
                /* P9_42 mcasp1_aclkx - bit clock */
                0x1a4 0x23
                /* P9_27 mcasp1_fsx - frame sync */
                0x1a8 0x23
                /* P9_41 mcasp1_axr0 - i2s input */
             >;
        };
};

&mcasp1 {
        #sound-dai-cells = <0>;
        pinctrl-names = "default";
        pinctrl-0 = <&mcasp1_pins>;
        status = "okay";
        op-mode = <0>;
        tdm-slots = <2>;
        num-serializer = <4>;
        serial-dir = < /* 1 TX 2 RX 0 unused */
                2 0 0 0
                >;
        rx-num-evt = <1>;
        tx-num-evt = <1>;
};

/ {
        pcm5102a: pcm5102a {
                #sound-dai-cells = <0>;
                compatible = "ti,pcm5102a";
                status = "okay";
        };

        sound1: sound@1 {
                compatible = "simple-audio-card";
                simple-audio-card,name = "PCM5102a";
                simple-audio-card,format = "i2s";
                simple-audio-card,bitclock-master = <&sound1_master>;
                simple-audio-card,frame-master = <&sound1_master>;
                simple-audio-card,bitclock-inversion;

                simple-audio-card,cpu {
                        sound-dai = <&mcasp1>;
                };

                sound1_master: simple-audio-card,codec {
                #sound-dai-cells = <0>;
                sound-dai = <&pcm5102a>;
                clocks = <&mcasp1_fck>;
                clock-names = "mclk";
                };
        };
};


I have also compiled the kernel with a new driver pcm5102 as suggested in the document. Finally, I see the driver listed in the output of the arecord command.

root@arm:/sys/class/gpio# arecord -l
**** List of CAPTURE Hardware Devices ****
card 0: PCM5102a [PCM5102a], device 0: davinci-mcasp.0-pcm5102a-hifi pcm5102a-hifi-0 []
  Subdevices: 1/1
  Subdevice #0: subdevice #0


However whenever I try to record audio, I am not getting any audio data. The audio file is formed, but the file size is always 44 bytes irrespective of how long I try to record audio for. Clearly no data is there in the file. 

Recording using arecord command gives error as below

arecord -d 10 -Dhw:0,0 -f dat audio.wav
Recording WAVE 'audio.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
arecord: pcm_read:2032: read error: Input/output error

Moreover, whenever I try to connect the clock (MCASP1_ACLKR (Bit Clock) - P9_42) with my oscilloscope, I don't see any pulses. Looks like there is no proper clock signal on this pin. What can I do to debug, and fix this?

Any ideas?

Parag

 
  • Hi Parag,

    Parag Sharma said:
    mcasp1_pins: mcasp1_pins { pinctrl-single,pins = < /* sink must enable receivers */ 0x1a0 0x23 /* P9_42 mcasp1_aclkx - bit clock */

    Parag Sharma said:
    simple-audio-card,bitclock-master = <&sound1_master>;

    Parag Sharma said:
    sound1_master: simple-audio-card,codec { #sound-dai-cells = <0>; sound-dai = <&pcm5102a>; clocks = <&mcasp1_fck>; clock-names = "mclk"; };

    Parag Sharma said:
    Moreover, whenever I try to connect the clock (MCASP1_ACLKR (Bit Clock) - P9_42) with my oscilloscope, I don't see any pulses. Looks like there is no proper clock signal on this pin. What can I do to debug, and fix this?

    You configure your AM335x McASP1 module as slave, thus you need to provide the bit clock from PCM5102A dummy codec to AM335x pin B12 MCASP0_ACLKR.mcasp1_aclkx

    Check in user space (with devmem2 or omapconf tool) that you have the correct value in register CONF_MCASP0_ACLKR/0x44E109A0.

    The bit clock scheme of the link you have provided is:

    PCM1864 ADC --> C5517 DSP J29_Pin3 --> AM335x McASP1 P9_42/B12

    Your bit clock scheme should be:

    Adafruit MIC --> AM335x McASP1 P9_42/B12

    Check also below pointers for audio debug guidelines:

    http://processors.wiki.ti.com/index.php/Linux_Core_Audio_User's_Guide#If_there.27s_an_issue

    Regards,
    Pavel

  • Hi Pavel,

    Thanks for your help in figuring this out. However is it possible to configure AM335x McASP1 module as master instead of slave so it itself can drive the clock?

  • Parag,

    Yes, you can configure AM335x McASP module as a master.

    SND_SOC_DAIFMT_CBS_CFS - McASP is master for bit clock and frame sync

    Refer to the below pointers for more info:

    www.ti.com/.../sprac09a.pdf
    5.2 Data Format and Clocking
    5.3 Example: McASP3 in I2S Mode

    processors.wiki.ti.com/.../Sitara_Linux_Audio_DAC_Example


    Regards,
    Pavel
  • Hi ,Pavel

    I Configured the Mcasp0 and device tree according to the processors.wiki.ti.com/.../Sitara_Linux_Audio_DAC_Example

    I am seeing clock out on both bclk and fsclk and data is being transmitted ,but

    when i try to configure it in Capture mode the bitclock is present but it is not of the required form and the fsclk is entirely missing.

    Please suggest a solution.

  • Ajinkya,

    Which version of AM335x TI PSDK (if any) you are using?

    processors.wiki.ti.com/.../Sitara_Linux_Audio_DAC_Example

    This wiki is valid for old kernel versions. For latest (4.9) kernel versions, you should use DTS files. See the below doc, it is more up to date:

    www.ti.com/.../sprac97.pdf

    If issue remains, please attach your latest DTS file for review.

    Regards,
    Pavel
  • /*
     * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
     *
     * This program is free software; you can redistribute it and/or modify
     * it under the terms of the GNU General Public License version 2 as
     * published by the Free Software Foundation.
     */
    /dts-v1/;
     
    #include "am33xx.dtsi"
    #include "am335x-bone-common.dtsi"
     
    &ldo3_reg {
    	regulator-min-microvolt = <1800000>;
    	regulator-max-microvolt = <3300000>;
    	regulator-always-on;
    };
     
    &mmc1 {
    	vmmc-supply = <&ldo3_reg>;
    };
     
    &am33xx_pinmux {
    	mcasp0_pins: mcasp0_pins {
    		pinctrl-single,pins = <
    			0x190 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mcasp0_aclkx */
    			0x194 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mcasp0_fsx*/
    			0x198 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* mcasp0_axr0 */
    		>;
    	};
    };
     
    &mcasp0 {
    		pinctrl-names = "default";
    		pinctrl-0 = <&mcasp0_pins>;
    		status = "okay";
    		op-mode = <0>;          /* MCASP_IIS_MODE */
    		tdm-slots = <2>;
    		/* 16 serializer */
    		serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
    			2 1 0 0
    		>;
    		tx-num-evt = <32>;
    		rx-num-evt = <32>;
    };
     
    / {
     
    	pcm5102a: pcm5102a {
    		compatible = "ti,pcm5102a";
    	};
     
    	sound {
    		compatible = "ti,pcm5102a-evm-audio";
    		ti,model = "TI PCM5102A";
    		ti,audio-codec = <&pcm5102a>;
    		ti,mcasp-controller = <&mcasp0>;
    		ti,codec-clock-rate = <24000000>;
    	};
     
    };

    Hi Pavel I am using ti-processor-sdk-linux-am335x-evm-04.03.00.05

    and the dts I am using is

  • AJINKYA PRABHU said:
    sound { compatible = "ti,pcm5102a-evm-audio";

    You should use "simple-audio-card"

    sound {
            compatible = "simple-audio-card";

    Refer to the below e2e thread for more info:

    Regards,
    Pavel

  • changing it from

    sound { compatible = "ti,pcm5102a-evm-audio";

    to

    sound { compatible = "simple-audio-card";

    causes this :

    sh-3.2# arecord -l
    arecord: device_list:268: no soundcards found...
    sh-3.2# aplay -l
    aplay: device_list:268: no soundcards found...
    

    using pcm5102a-evm-audio gives this

    sh-3.2# aplay -l
    **** List of PLAYBACK Hardware Devices ****
    card 0: PCM5102A [TI PCM5102A], device 0: Capture pcm5102a-hifi-0 []
      Subdevices: 1/1
      Subdevice #0: subdevice #0
    sh-3.2# arecord -l
    **** List of CAPTURE Hardware Devices ****
    card 0: PCM5102A [TI PCM5102A], device 0: Capture pcm5102a-hifi-0 []
      Subdevices: 1/1
      Subdevice #0: subdevice #0
    

    using pcm5102a-evm-audio give both clocks for aplay

    and BCLK

    But arecord gives:

    (arecord -Dhw:0,0 -f dat asddd.wav)

    for FSCLK

    BCLK

  • AJINKYA PRABHU said:

    changing it from

    sound { compatible = "ti,pcm5102a-evm-audio";

    to

    sound { compatible = "simple-audio-card";

    causes this :

    sh-3.2# arecord -l
    arecord: device_list:268: no soundcards found...
    sh-3.2# aplay -l
    aplay: device_list:268: no soundcards found...

    This is because you change only "compatible", but that is not enough. You should change more things in DTS, as explained in sprac97.pdf

    4.2.3.1 Simple Audio Card
    Plumbing between the PCM5102A device driver and the AM335X processor is done in the device tree with the simple-audio-card device tree bindings. For more information about available simple-audio-card device tree properties, see the following kernel documentation:

    Documentation/devicetree/bindings/sound/simple-card.txt

    pcm5102a: pcm5102a {
        #sound-dai-cells = <0>;
        compatible = "ti,pcm5102a";
        status = "okay";
    };

    sound1: sound@1 {
        compatible = "simple-audio-card";
        simple-audio-card,name = "PCM5102a";
        simple-audio-card,format = "i2s";
        simple-audio-card,bitclock-master = <&sound1_master>;
        simple-audio-card,frame-master = <&sound1_master>;
        simple-audio-card,bitclock-inversion;
        
        simple-audio-card,cpu {
            sound-dai = <&mcasp1>;
        };

    sound1_master: simple-audio-card,codec {
        #sound-dai-cells = <0>;
        sound-dai = <&pcm5102a>;
        clocks = <&mcasp1_fck>;
        clock-names = "mclk";
    };

  • AJINKYA PRABHU said:

    using pcm5102a-evm-audio gives this

    sh-3.2# aplay -l
    **** List of PLAYBACK Hardware Devices ****
    card 0: PCM5102A [TI PCM5102A], device 0: Capture pcm5102a-hifi-0 []
      Subdevices: 1/1
      Subdevice #0: subdevice #0
    sh-3.2# arecord -l
    **** List of CAPTURE Hardware Devices ****
    card 0: PCM5102A [TI PCM5102A], device 0: Capture pcm5102a-hifi-0 []
      Subdevices: 1/1
      Subdevice #0: subdevice #0
    

    using pcm5102a-evm-audio give both clocks for aplay

    Who is supposed to provide the FS and BCLK signals? Is it AM335x device?

    Please provide full console log of arecord and aplay commands. Provide also register dump of McASP pinmux registers and McASP module registers.

    Regard,
    Pavel

  • This is the device tree after The changes mentioned in the document:

    /*
     * Copyright (C) 2012 Texas Instruments Incorporated - <a href="www.ti.com/.../a>
     *
     * This program is free software; you can redistribute it and/or modify
     * it under the terms of the GNU General Public License version 2 as
     * published by the Free Software Foundation.
     */
    /dts-v1/;
     
    #include "am33xx.dtsi"
    #include "am335x-bone-common.dtsi"
     
    &ldo3_reg {
        regulator-min-microvolt = <1800000>;
        regulator-max-microvolt = <3300000>;
        regulator-always-on;
    };
     
    &mmc1 {
        vmmc-supply = <&ldo3_reg>;
    };
     
    &am33xx_pinmux {
            mcasp1_pins: mcasp1_pins {
                 pinctrl-single,pins = <
                    /* sink must enable receivers */
                    0x1a0 0x23
                    /* P9_42 mcasp1_aclkx - bit clock */
                    0x1a4 0x23
                    /* P9_27 mcasp1_fsx - frame sync */
                    0x1a8 0x23
                    /* P9_41 mcasp1_axr0 - i2s input */
                 >;
            };
    };
    
    &mcasp1 {
            #sound-dai-cells = <0>;
            pinctrl-names = "default";
            pinctrl-0 = <&mcasp1_pins>;
            status = "okay";
            op-mode = <0>;
            tdm-slots = <2>;
            num-serializer = <4>;
            serial-dir = < /* 1 TX 2 RX 0 unused */
                    2 0 0 0
                    >;
            rx-num-evt = <1>;
            tx-num-evt = <1>;
    };
    
    / {
            pcm5102a: pcm5102a {
                    #sound-dai-cells = <0>;
                    compatible = "ti,pcm5102a";
                    status = "okay";
            };
    
            sound1: sound@1 {
                    compatible = "simple-audio-card";
                    simple-audio-card,name = "PCM5102a";
                    simple-audio-card,format = "i2s";
                    simple-audio-card,bitclock-master = <&sound1_master>;
                    simple-audio-card,frame-master = <&sound1_master>;
                    simple-audio-card,bitclock-inversion;
    
                    simple-audio-card,cpu {
                            sound-dai = <&mcasp1>;
                    };
    
                    sound1_master: simple-audio-card,codec {
                    #sound-dai-cells = <0>;
                    sound-dai = <&pcm5102a>;
                    clocks = <&mcasp1_fck>;
                    clock-names = "mclk";
                    };
            };
    };
    

    Console logs for aplay and arecord:

    sh-3.2# aplay aj.wav 
     Playing WAVE 'aj.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
     [   36.741784] davinci-mcasp 4803c000.mcasp: stream has more channels (2) than are enabled in mcasp (0)
     [   36.755080] davinci-mcasp 4803c000.mcasp: ASoC: can't set 4803c000.mcasp hw params: -22
     aplay: set_params:1361: Unable to install hw params:
     ACCESS:  RW_INTERLEAVED
     FORMAT:  S16_LE
     SUBFORMAT:  STD
     SAMPLE_BITS: 16
     FRAME_BITS: 32
     CHANNELS: 2
     RATE: 48000
     PERIOD_TIME: 125000
     PERIOD_SIZE: 6000
     PERIOD_BYTES: 24000
     PERIODS: 4
     BUFFER_TIME: 500000
     BUFFER_SIZE: 24000
     BUFFER_BYTES: 96000
     TICK_TIME: 0

    sh-3.2# arecord -Dhw:0,0 -d 10 -f dat asd.wav Recording WAVE 'asd.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo arecord: pcm_read:2096: read error: Input/output error
    sh-3.2# arecord -l
    **** List of CAPTURE Hardware Devices ****
    card 0: PCM5102a [PCM5102a], device 0: davinci-mcasp.0-pcm5102a-hifi pcm5102a-hifi-0 []
      Subdevices: 1/1
      Subdevice #0: subdevice #0

    sh-3.2# aplay -l **** List of PLAYBACK Hardware Devices **** card 0: PCM5102a [PCM5102a], device 0: davinci-mcasp.0-pcm5102a-hifi pcm5102a-hifi-0 [] Subdevices: 1/1 Subdevice #0: subdevice #0

  • Yes the AM335x has to provide the FS and BCLK to the mic.
  • Ajinkya,

    You have only one data pin, mcasp1_axr0 configured as input. Thus you have only capture available and I am not sure why you test playback also!

    As you need AM335x to be master (to drive FS and BCLK), you need to change your DTS file to reflect that.


    sound1: sound@1 {
    compatible = "simple-audio-card";
    simple-audio-card,name = "PCM5102a";
    simple-audio-card,format = "i2s";
    simple-audio-card,bitclock-master = <&sound1_master>;
    simple-audio-card,frame-master = <&sound1_master>;
    simple-audio-card,bitclock-inversion;

    sound1_master: simple-audio-card,cpu {
    sound-dai = <&mcasp1>;
    };

    simple-audio-card,codec {
    #sound-dai-cells = <0>;
    sound-dai = <&pcm5102a>;
    clocks = <&mcasp1_fck>;
    clock-names = "mclk";
    };
    };


    Regards,
    Pavel
  • Hi Pavel ,

    1)How do I resolve the Input/Output error?

    2)What changes would you recommend to make the am335x to be the master?

    regards,

    Ajinkya

  • 1) How do I resolve the Input/Output error?

    The arecord I/O error happens when there is no data flowing from the hardware to ALSA in 10 secs. One likely reason for that to happen is if the master (in your case, the AM335x device) is not providing FSYNC and BCLK. Without them, external codec doesn't move any data on axr0 pin. I suggest you make sure that the AM335x is correctly providing the BCLK/FYSNC.

    See also below doc:

    www.ti.com/.../sprac10.pdf

    6.7 Input/Output Error During Audio Record

    2)What changes would you recommend to make the am335x to be the master?

    sound1: sound@1 {
    compatible = "simple-audio-card";
    simple-audio-card,name = "PCM5102a";
    simple-audio-card,format = "i2s";
    simple-audio-card,bitclock-master = <&sound1_master>;
    simple-audio-card,frame-master = <&sound1_master>;
    simple-audio-card,bitclock-inversion;

    sound1_master: simple-audio-card,cpu {
    sound-dai = <&mcasp1>;
    };

    simple-audio-card,codec {
    #sound-dai-cells = <0>;
    sound-dai = <&pcm5102a>;
    clocks = <&mcasp1_fck>;
    clock-names = "mclk";
    };
    };

  • Hi Pavel 

    when I run the command

    arecord -d 10 -Dhw:0,0 -f dat audio.wav

    the file is created but the duration of recording isn't very long, I thought since -d 10 would tell it to record for 10 secs

    but what could be the issue for this?

  • Hi Pavel ,

    The Input/Output Error seems to have gone but I am still not getting a proper clock on BCLK and no clock on LRCLK

    And also when I try to do

    omapconf show mcasp1

    it gives me:

    HW Platform:
      Generic AM33XX (Flattened Device Tree)
      AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz))
    Error: I2C Read failed
    Error: I2C Read failed
    Error: I2C Read failed
      TPS65217C  ES1.2 
    Error: I2C Read failed
      UNKNOWN AUDIO IC
    
    

    Can you suggest a solution for this?

  • AJINKYA PRABHU said:

    when I run the command

    arecord -d 10 -Dhw:0,0 -f dat audio.wav

    the file is created but the duration of recording isn't very long, I thought since -d 10 would tell it to record for 10 secs

    but what could be the issue for this?

    With this command you setup 48KHz frame sync and 1.536MHz bit clock. Do you observe these frequencies (48KHz FS and 1.536MHz BCLK)?

    Please provide me register dump of McASP1 pinmux values and McASP1 registers. You can get these from user space with devmem2 tool or omapconf tool. See the below pointers for more info:

    3 McASP Register Settings

  • AJINKYA PRABHU said:

    The Input/Output Error seems to have gone but I am still not getting a proper clock on BCLK and no clock on LRCLK

    And also when I try to do

    omapconf show mcasp1

    it gives me:

    HW Platform:
      Generic AM33XX (Flattened Device Tree)
      AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz))
    Error: I2C Read failed
    Error: I2C Read failed
    Error: I2C Read failed
      TPS65217C  ES1.2 
    Error: I2C Read failed
      UNKNOWN AUDIO IC
    
    

    Can you suggest a solution for this?

    Actually I will suggest you to dump only Control Module McASP1 pinmux registers in user space (devmem2 or omapconf). While the McASP1 module registers should be check inside the kernel, with printk. See the below e2e thread for more info:

    Regards,
    Pavel

  • 1)This is the what I get when I run

    devmem2 0x4803c000
    

    0x4803c000 is for Mcasp 1

    /dev/mem opened.[ 3042.065899] Unhandled fault: external abort on non-linefetch (0
    [ 3042.074752] pgd = dc54c000
    [ 3042.077470] [b6f38000] *pgd=9a108831, *pte=4803c303, *ppte=4803ca33
    
    Memory mapped at address 0xb6f38000.
    [ 3042.085144] audit: type=1701 audit(1522080492.952:4): auid=4294967295 uid=0 gi7
    Bus error (core dumped)
    

    2)What should i printk in the kernel?

    3) Should I add a clock node inside the  ,cpu node?

    &am33xx_pinmux {
            mcasp1_pins: mcasp1_pins {
                 pinctrl-single,pins = <
                    /* sink must enable receivers */
                    0x1a0 0x23
                    /* P9_42 mcasp1_aclkx - bit clock */
                    0x1a4 0x23
                    /* P9_27 mcasp1_fsx - frame sync */
                    0x1a8 0x23
                    /* P9_41 mcasp1_axr0 - i2s input */
                 >;
            };
    };
    
    &mcasp1 {
            #sound-dai-cells = <0>;
            pinctrl-names = "default";
            pinctrl-0 = <&mcasp1_pins>;
            status = "okay";
            op-mode = <0>;
            tdm-slots = <2>;
            num-serializer = <4>;
            serial-dir = < /* 1 TX 2 RX 0 unused */
                    2 0 0 0
                    >;
            rx-num-evt = <1>;
            tx-num-evt = <1>;
    };
    
    / {
            pcm5102a: pcm5102a {
                    #sound-dai-cells = <0>;
                    compatible = "ti,pcm5102a";
                    status = "okay";
            };
    
            sound1: sound@1 {
                    compatible = "simple-audio-card";
                    simple-audio-card,name = "PCM5102a";
                    simple-audio-card,format = "i2s";
                    simple-audio-card,bitclock-master = <&sound1_master>;
                    simple-audio-card,frame-master = <&sound1_master>;
                    simple-audio-card,bitclock-inversion;
    
                     sound1_master:simple-audio-card,cpu {
                            sound-dai = <&mcasp1>;
                    };
    
                    simple-audio-card,codec {
                    #sound-dai-cells = <0>;
                    sound-dai = <&pcm5102a>;
                    clocks = <&mcasp1_fck>;
                    clock-names = "mclk";
                    };
            };
    };

  • When I run

    	
    arecord -d 10 -Dhw:0,0 -f dat audio.wav

    I get only a 24Mhz clock on the BCLK pin and

    NO clk on the LRCLK pin

  • AJINKYA PRABHU said:

    1)This is the what I get when I run

    devmem2 0x4803c000
    

    0x4803c000 is for Mcasp 1

    /dev/mem opened.[ 3042.065899] Unhandled fault: external abort on non-linefetch (0
    [ 3042.074752] pgd = dc54c000
    [ 3042.077470] [b6f38000] *pgd=9a108831, *pte=4803c303, *ppte=4803ca33
    
    Memory mapped at address 0xb6f38000.
    [ 3042.085144] audit: type=1701 audit(1522080492.952:4): auid=4294967295 uid=0 gi7
    Bus error (core dumped)

    This is expected. Do not dump McASP1 module register in user space.

    AJINKYA PRABHU said:
    2)What should i printk in the kernel?

    McASP1 module registers, at start addr 0x4803C000

    AJINKYA PRABHU said:
    3) Should I add a clock node inside the  ,cpu node?

    I do not see cpu node in your DTS extract, thus I can not comment.

  • AJINKYA PRABHU said:
    arecord -d 10 -Dhw:0,0 -f dat audio.wav

    I get only a 24Mhz clock on the BCLK pin and

    NO clk on the LRCLK pin

    Provide McASP1 module register dump after/during arecord execution

  • Hi Pavel ,

    I wanted to know where I can get the McASP1 module registers from ? As in which file and where  should I edit the printk statement to get the value of the McASP1 module Registers?

    Moreover ,

    /sys/kernel/debug

    is empty and the pinctrl directory is missing .

    thanks

  • AJINKYA PRABHU said:
    I wanted to know where I can get the McASP1 module registers from ? As in which file and where  should I edit the printk statement to get the value of the McASP1 module Registers?

    dump the McASP1 registers at the end of the mcasp_start_rx() function at mcasp driver:

    linux-kernel/sound/soc/davinci/davinci-mcasp.c

    See below e2e thread for details:

    AJINKYA PRABHU said:

    Moreover ,

    /sys/kernel/debug

    is empty and the pinctrl directory is missing .

    You do not need /sys/kernel/debug. Just read the McASP1 Control Module pinmux registers with devmem2 and provide me the result.

  • Here is the code I used to dump the register values

    printk("0x%x\n", mcasp->base);
        printk("mcasp_start_rx: DAVINCI_MCASP_TXFMCTL_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_TXFMCTL_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_RXFMCTL_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_RXFMCTL_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_TXFMT_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_TXFMT_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_RXFMT_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_RXFMT_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_ACLKXCTL_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_ACLKXCTL_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_ACLKRCTL_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_ACLKRCTL_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_PDIR_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_PDIR_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_RXMASK_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_RXMASK_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_TXMASK_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_TXMASK_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_RXTDM_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_RXTDM_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_TXTDM_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_TXTDM_REG));

    And below is the output from the above code

    [  636.578439] 0xfa03c000
    [  636.580807] mcasp_start_rx: DAVINCI_MCASP_TXFMCTL_REG:0x13
    [  636.586399] mcasp_start_rx: DAVINCI_MCASP_RXFMCTL_REG:0x113
    [  636.592079] mcasp_start_rx: DAVINCI_MCASP_TXFMT_REG:0x10074
    [  636.597759] mcasp_start_rx: DAVINCI_MCASP_RXFMT_REG:0x18070
    [  636.603439] mcasp_start_rx: DAVINCI_MCASP_ACLKXCTL_REG:0x180060
    [  636.609467] mcasp_start_rx: DAVINCI_MCASP_ACLKRCTL_REG:0x20
    [  636.615147] mcasp_start_rx: DAVINCI_MCASP_PDIR_REG:0xb4000000
    [  636.621001] mcasp_start_rx: DAVINCI_MCASP_RXMASK_REG:0xffff
    [  636.626680] mcasp_start_rx: DAVINCI_MCASP_TXMASK_REG:0xffff
    [  636.632360] mcasp_start_rx: DAVINCI_MCASP_RXTDM_REG:0x3
    [  636.637691] mcasp_start_rx: DAVINCI_MCASP_TXTDM_REG:0x0

  • Running

    u32 address_1 = phys_to_virt(0x4803c000);
    	printk("McASP 1 AJINKYA address 0x%x",address_1); 

    Gives

    [  143.096451] davinci_mcasp_triggerMcASP 1 AJINKYA address 0x8803c000
    

  • Hi Pavel ,

    I printed theses Values

    printk("0x%x\n", mcasp->base);
        printk("mcasp_start_rx: DAVINCI_MCASP_TXFMCTL_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_TXFMCTL_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_RXFMCTL_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_RXFMCTL_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_TXFMT_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_TXFMT_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_RXFMT_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_RXFMT_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_ACLKXCTL_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_ACLKXCTL_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_ACLKRCTL_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_ACLKRCTL_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_PDIR_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_PDIR_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_RXMASK_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_RXMASK_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_TXMASK_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_TXMASK_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_RXTDM_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_RXTDM_REG));
        printk("mcasp_start_rx: DAVINCI_MCASP_TXTDM_REG:0x%x \n", mcasp_get_reg(mcasp, DAVINCI_MCASP_TXTDM_REG));
    
    
    

    Dump

    [  636.578439] 0xfa03c000
    [  636.580807] mcasp_start_rx: DAVINCI_MCASP_TXFMCTL_REG:0x13
    [  636.586399] mcasp_start_rx: DAVINCI_MCASP_RXFMCTL_REG:0x113
    [  636.592079] mcasp_start_rx: DAVINCI_MCASP_TXFMT_REG:0x10074
    [  636.597759] mcasp_start_rx: DAVINCI_MCASP_RXFMT_REG:0x18070
    [  636.603439] mcasp_start_rx: DAVINCI_MCASP_ACLKXCTL_REG:0x180060
    [  636.609467] mcasp_start_rx: DAVINCI_MCASP_ACLKRCTL_REG:0x20
    [  636.615147] mcasp_start_rx: DAVINCI_MCASP_PDIR_REG:0xb4000000
    [  636.621001] mcasp_start_rx: DAVINCI_MCASP_RXMASK_REG:0xffff
    [  636.626680] mcasp_start_rx: DAVINCI_MCASP_TXMASK_REG:0xffff
    [  636.632360] mcasp_start_rx: DAVINCI_MCASP_RXTDM_REG:0x3
    [  636.637691] mcasp_start_rx: DAVINCI_MCASP_TXTDM_REG:0x0

  • Ajinkya,

    Please provide me also the below McASP module registers dump:

    DAVINCI_MCASP_GBLCTL_REG
    DAVINCI_MCASP_GBLCTLX_REG
    DAVINCI_MCASP_AHCLKXCTL_REG
    DAVINCI_MCASP_TXSTAT_REG
    DAVINCI_MCASP_XRSRCTL_REG(0)

    Please provide me also McASP1 pinmux register dump.

    Regards,
    Pavel
  • Hi Pavel,
    Here are the values of the registers you asked for.

    [ 54.475631] mcasp_start_rx
    [ 54.478353] BASE: 0xfa03c000
    [ 54.481242] DAVINCI_MCASP_TXFMCTL_REG:0x13
    [ 54.485439] DAVINCI_MCASP_RXFMCTL_REG:0x113
    [ 54.489723] DAVINCI_MCASP_TXFMT_REG:0x10074
    [ 54.494006] DAVINCI_MCASP_RXFMT_REG:0x18070
    [ 54.498289] DAVINCI_MCASP_ACLKXCTL_REG:0x18006f
    [ 54.502921] DAVINCI_MCASP_ACLKRCTL_REG:0x2f
    [ 54.507204] DAVINCI_MCASP_PDIR_REG:0xbc000000
    [ 54.511662] DAVINCI_MCASP_RXMASK_REG:0xffff
    [ 54.515946] DAVINCI_MCASP_TXMASK_REG:0xffff
    [ 54.520229] DAVINCI_MCASP_RXTDM_REG:0x3
    [ 54.524164] DAVINCI_MCASP_TXTDM_REG:0x0
    [ 54.528099] DAVINCI_MCASP_GBLCTL_REG:0x1f
    [ 54.532208] DAVINCI_MCASP_GBLCTLX_REG:0x1f
    [ 54.536404] DAVINCI_MCASP_AHCLKXCTL_REG:0x188000
    [ 54.541124] DAVINCI_MCASP_TXSTAT_REG:0x10c
    [ 54.545321] DAVINCI_MCASP_XRSRCTL_REG(0):0x2


    Also how should I dump the MCASP1 pinmux registers. Here i am showing the result of cat of "/sys/kernel/debug/pinctrl/44e10800.pinmux/pins"

    root@am335x-evm:/sys/kernel/debug/pinctrl/44e10800.pinmux# cat pins
    registered pins: 142
    pin 0 (44e10800.0) 00000031 pinctrl-single
    pin 1 (44e10804.0) 00000031 pinctrl-single
    pin 2 (44e10808.0) 00000031 pinctrl-single
    pin 3 (44e1080c.0) 00000031 pinctrl-single
    pin 4 (44e10810.0) 00000031 pinctrl-single
    pin 5 (44e10814.0) 00000031 pinctrl-single
    pin 6 (44e10818.0) 00000031 pinctrl-single
    pin 7 (44e1081c.0) 00000031 pinctrl-single
    pin 8 (44e10820.0) 00000027 pinctrl-single
    pin 9 (44e10824.0) 00000027 pinctrl-single
    pin 10 (44e10828.0) 00000027 pinctrl-single
    pin 11 (44e1082c.0) 00000027 pinctrl-single
    pin 12 (44e10830.0) 00000027 pinctrl-single
    pin 13 (44e10834.0) 00000027 pinctrl-single
    pin 14 (44e10838.0) 00000027 pinctrl-single
    pin 15 (44e1083c.0) 00000027 pinctrl-single
    pin 16 (44e10840.0) 00000027 pinctrl-single
    pin 17 (44e10844.0) 00000027 pinctrl-single
    pin 18 (44e10848.0) 00000027 pinctrl-single
    pin 19 (44e1084c.0) 00000027 pinctrl-single
    pin 20 (44e10850.0) 00000027 pinctrl-single
    pin 21 (44e10854.0) 00000007 pinctrl-single
    pin 22 (44e10858.0) 00000017 pinctrl-single
    pin 23 (44e1085c.0) 00000007 pinctrl-single
    pin 24 (44e10860.0) 00000017 pinctrl-single
    pin 25 (44e10864.0) 00000027 pinctrl-single
    pin 26 (44e10868.0) 00000027 pinctrl-single
    pin 27 (44e1086c.0) 00000007 pinctrl-single
    pin 28 (44e10870.0) 00000037 pinctrl-single
    pin 29 (44e10874.0) 00000037 pinctrl-single
    pin 30 (44e10878.0) 00000037 pinctrl-single
    pin 31 (44e1087c.0) 00000037 pinctrl-single
    pin 32 (44e10880.0) 00000032 pinctrl-single
    pin 33 (44e10884.0) 00000032 pinctrl-single
    pin 34 (44e10888.0) 00000037 pinctrl-single
    pin 35 (44e1088c.0) 00000027 pinctrl-single
    pin 36 (44e10890.0) 00000037 pinctrl-single
    pin 37 (44e10894.0) 00000037 pinctrl-single
    pin 38 (44e10898.0) 00000037 pinctrl-single
    pin 39 (44e1089c.0) 00000037 pinctrl-single
    pin 40 (44e108a0.0) 00000008 pinctrl-single
    pin 41 (44e108a4.0) 00000008 pinctrl-single
    pin 42 (44e108a8.0) 00000008 pinctrl-single
    pin 43 (44e108ac.0) 00000008 pinctrl-single
    pin 44 (44e108b0.0) 00000008 pinctrl-single
    pin 45 (44e108b4.0) 00000008 pinctrl-single
    pin 46 (44e108b8.0) 00000008 pinctrl-single
    pin 47 (44e108bc.0) 00000008 pinctrl-single
    pin 48 (44e108c0.0) 00000008 pinctrl-single
    pin 49 (44e108c4.0) 00000008 pinctrl-single
    pin 50 (44e108c8.0) 00000008 pinctrl-single
    pin 51 (44e108cc.0) 00000008 pinctrl-single
    pin 52 (44e108d0.0) 00000008 pinctrl-single
    pin 53 (44e108d4.0) 00000008 pinctrl-single
    pin 54 (44e108d8.0) 00000008 pinctrl-single
    pin 55 (44e108dc.0) 00000008 pinctrl-single
    pin 56 (44e108e0.0) 00000000 pinctrl-single
    pin 57 (44e108e4.0) 00000000 pinctrl-single
    pin 58 (44e108e8.0) 00000000 pinctrl-single
    pin 59 (44e108ec.0) 00000000 pinctrl-single
    pin 60 (44e108f0.0) 00000030 pinctrl-single
    pin 61 (44e108f4.0) 00000030 pinctrl-single
    pin 62 (44e108f8.0) 00000030 pinctrl-single
    pin 63 (44e108fc.0) 00000030 pinctrl-single
    pin 64 (44e10900.0) 00000030 pinctrl-single
    pin 65 (44e10904.0) 00000030 pinctrl-single
    pin 66 (44e10908.0) 00000028 pinctrl-single
    pin 67 (44e1090c.0) 00000028 pinctrl-single
    pin 68 (44e10910.0) 00000030 pinctrl-single
    pin 69 (44e10914.0) 00000000 pinctrl-single
    pin 70 (44e10918.0) 00000030 pinctrl-single
    pin 71 (44e1091c.0) 00000000 pinctrl-single
    pin 72 (44e10920.0) 00000000 pinctrl-single
    pin 73 (44e10924.0) 00000000 pinctrl-single
    pin 74 (44e10928.0) 00000000 pinctrl-single
    pin 75 (44e1092c.0) 00000030 pinctrl-single
    pin 76 (44e10930.0) 00000030 pinctrl-single
    pin 77 (44e10934.0) 00000030 pinctrl-single
    pin 78 (44e10938.0) 00000030 pinctrl-single
    pin 79 (44e1093c.0) 00000030 pinctrl-single
    pin 80 (44e10940.0) 00000030 pinctrl-single
    pin 81 (44e10944.0) 00000027 pinctrl-single
    pin 82 (44e10948.0) 00000030 pinctrl-single
    pin 83 (44e1094c.0) 00000010 pinctrl-single
    pin 84 (44e10950.0) 00000037 pinctrl-single
    pin 85 (44e10954.0) 00000037 pinctrl-single
    pin 86 (44e10958.0) 00000037 pinctrl-single
    pin 87 (44e1095c.0) 00000037 pinctrl-single
    pin 88 (44e10960.0) 0000002f pinctrl-single
    pin 89 (44e10964.0) 00000027 pinctrl-single
    pin 90 (44e10968.0) 00000037 pinctrl-single
    pin 91 (44e1096c.0) 00000037 pinctrl-single
    pin 92 (44e10970.0) 00000030 pinctrl-single
    pin 93 (44e10974.0) 00000000 pinctrl-single
    pin 94 (44e10978.0) 00000033 pinctrl-single
    pin 95 (44e1097c.0) 00000033 pinctrl-single
    pin 96 (44e10980.0) 00000037 pinctrl-single
    pin 97 (44e10984.0) 00000037 pinctrl-single
    pin 98 (44e10988.0) 00000030 pinctrl-single
    pin 99 (44e1098c.0) 00000030 pinctrl-single
    pin 100 (44e10990.0) 00000000 pinctrl-single
    pin 101 (44e10994.0) 00000010 pinctrl-single
    pin 102 (44e10998.0) 00000027 pinctrl-single
    pin 103 (44e1099c.0) 00000002 pinctrl-single

    *pin 104 (44e109a0.0) 00000003 pinctrl-single
    pin 105 (44e109a4.0) 00000003 pinctrl-single
    pin 106 (44e109a8.0) 00000023 pinctrl-single *

    pin 107 (44e109ac.0) 00000030 pinctrl-single
    pin 108 (44e109b0.0) 00000003 pinctrl-single
    pin 109 (44e109b4.0) 00000027 pinctrl-single
    pin 110 (44e109b8.0) 00000030 pinctrl-single
    pin 111 (44e109bc.0) 00000028 pinctrl-single
    pin 112 (44e109c0.0) 00000030 pinctrl-single
    pin 113 (44e109c4.0) 00000028 pinctrl-single
    pin 114 (44e109c8.0) 00000028 pinctrl-single
    pin 115 (44e109cc.0) 00000028 pinctrl-single
    pin 116 (44e109d0.0) 00000030 pinctrl-single
    pin 117 (44e109d4.0) 00000030 pinctrl-single
    pin 118 (44e109d8.0) 00000030 pinctrl-single
    pin 119 (44e109dc.0) 00000030 pinctrl-single
    pin 120 (44e109e0.0) 00000020 pinctrl-single
    pin 121 (44e109e4.0) 00000030 pinctrl-single
    pin 122 (44e109e8.0) 00000030 pinctrl-single
    pin 123 (44e109ec.0) 00000028 pinctrl-single
    pin 124 (44e109f0.0) 00000028 pinctrl-single
    pin 125 (44e109f4.0) 00000028 pinctrl-single
    pin 126 (44e109f8.0) 00000030 pinctrl-single
    pin 127 (44e109fc.0) 00000028 pinctrl-single
    pin 128 (44e10a00.0) 00000028 pinctrl-single
    pin 129 (44e10a04.0) 00000020 pinctrl-single
    pin 130 (44e10a08.0) 00000028 pinctrl-single
    pin 131 (44e10a0c.0) 00000028 pinctrl-single
    pin 132 (44e10a10.0) 00000028 pinctrl-single
    pin 133 (44e10a14.0) 00000028 pinctrl-single
    pin 134 (44e10a18.0) 00000028 pinctrl-single
    pin 135 (44e10a1c.0) 00000020 pinctrl-single
    pin 136 (44e10a20.0) 00000028 pinctrl-single
    pin 137 (44e10a24.0) 00000028 pinctrl-single
    pin 138 (44e10a28.0) 00000028 pinctrl-single
    pin 139 (44e10a2c.0) 00000028 pinctrl-single
    pin 140 (44e10a30.0) 00000028 pinctrl-single
    pin 141 (44e10a34.0) 00000020 pinctrl-single


    Here is the mcasp1 pinctrl values I defined in device tree

    &am33xx_pinmux {
    mcasp1_pins: mcasp1_pins{
    pinctrl-single,pins = <
    /* sink must enable receivers */
    AM33XX_IOPAD(0x9a0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* P9_42 mcasp1_aclkx - bit clock */
    AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* P9_27 mcasp1_fsx - frame sync */
    AM33XX_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* P9_41 mcasp1_axr0 - i2s input */
    >;
    };
    };
  • Hi Pavel,

    Can you also help me understand the role of this setting?

    enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */

    Why do we need to do this on our clock? Why do we choose GPIO1_27? Why not any other GPIO pin? What is so special about this pin that when set in the manner above, it enables the clock?

  • Parag Sharma said:
    *pin 104 (44e109a0.0) 00000003 pinctrl-single
    pin 105 (44e109a4.0) 00000003 pinctrl-single
    pin 106 (44e109a8.0) 00000023 pinctrl-single *

    Parag Sharma said:
    &am33xx_pinmux {
    mcasp1_pins: mcasp1_pins{
    pinctrl-single,pins = <
    /* sink must enable receivers */
    AM33XX_IOPAD(0x9a0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* P9_42 mcasp1_aclkx - bit clock */
    AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* P9_27 mcasp1_fsx - frame sync */
    AM33XX_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* P9_41 mcasp1_axr0 - i2s input */
    >;

    Please change pins mcasp1_aclkx and mcasp1_fsx from output to input/output, as we have re-time requirement. For more info check AM335x TRM, section 22.2.3 McASP Pin List

    Parag Sharma said:
    [ 54.532208] DAVINCI_MCASP_GBLCTLX_REG:0x1f

    This does NOT looks ok. Can you check if your flow goes through setting TX signals in mcasp_start_rx() function?

    static void mcasp_start_rx(struct davinci_mcasp *mcasp)
    {

    /* Start clocks */
        mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXHCLKRST);
        mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXCLKRST);
        /*
         * When ASYNC == 0 the transmit and receive sections operate
         * synchronously from the transmit clock and frame sync. We need to make
         * sure that the TX signlas are enabled when starting reception.
         */
        if (mcasp_is_synchronous(mcasp)) {

            printk("enable TX signals\n");
            mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST);
            mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST);
        }

  • Parag,

    gpio1_27 (HDMICLK_DISn) signal is used to enable/disable external 24.576MHz oscillator, which provides (when enabled) 24.576MHz clock signal to mcasp0_ahclkx signal (pin GPIO3_21)

    For more info check BBB user guide:

    github.com/.../System-Reference-Manual

    GPIO3_21 has a 24.576 MHZ clock on it

    This is required by the HDMI Framer for Audio purposes. We needed to run a clock into the processor to generate the correct clock frequency. In order to use the pin as a GPIO pin, you need to disable the clock. While this disables audio to the HDMI, the fact that you want to use this pin for something else, does the same thing.

    6.10.6 Audio Interface

    There is an I2S audio interface between the processor and the TDA19988. Stereo audio can be transported over the HDMI interface to an audio equipped display. In order to create the required clock frequencies, and external 24.576MHz oscillator, Y4, is used. From this clock, the processor generates the required clock frequencies for the TDA19988.
    In order to create the correct clock frequencies, we had to add an external 24.576MHZ oscillator. Unfortunately this had to be input into the processor using the pin previously used for GPIO3_21. In order to keep GPIO3_21 functionality, we provided a way to disable the oscillator if the need was there to use the pin on the expansion header.

    GPIO3_21 is also the 24.576MHZ clock input to the processor to enable HDMI audio. To use this pin the oscillator must be disabled.


    Regards,
    Pavel
  • Hi Pavel,

    The flow is not going inside "mcasp_is_synchronous" function. When I make the program to forcibly go inside the function (by putting a ! in the "if" condition), the clock starts showing correctly.

    What could be wrong here? What am I missing?

    Also frame sync clock (P9_27 mcasp1_fsx) is not showing up? Something wrong here?

    Parag

  • I added some logs in the mcasp_is_synchronous function

    static bool mcasp_is_synchronous(struct davinci_mcasp *mcasp)
    {
        u32 rxfmctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_RXFMCTL_REG);
        printk("DAVINCI_MCASP_RXFMCTL_REG: 0x%x\n", rxfmctl);
        u32 aclkxctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_ACLKXCTL_REG);
        printk("DAVINCI_MCASP_ACLKXCTL_REG: 0x%x\n", aclkxctl);
        printk("TX_ASYNC 0x%x\n", TX_ASYNC);
        printk("aclkxctl & TX_ASYNC 0x%x\n", aclkxctl & TX_ASYNC);
        printk("AFSRE 0x%x\n", AFSRE);
        printk("output: 0x%x\n", !(aclkxctl & TX_ASYNC) && rxfmctl & AFSRE);

        return !(aclkxctl & TX_ASYNC) && rxfmctl & AFSRE;
    }

    The logs are showing as

    [  103.785057] DAVINCI_MCASP_RXFMCTL_REG: 0x113
    [  103.789342] DAVINCI_MCASP_ACLKXCTL_REG: 0x18006f
    [  103.793975] TX_ASYNC 0x40
    [  103.796601] aclkxctl & TX_ASYNC 0x40
    [  103.800187] AFSRE 0x2
    [  103.802463] output: 0x0

    Where is the problem? Why this function returns 0 instead of 1?

  • Pavel,
    Thanks for your help on understanding the need for setting gpio1_27. It really helped clear a lot of my concepts.

    You would notice above, the value of register DAVINCI_MCASP_ACLKXCTL_REG is 0x18006f. The ASYNC (6th) bit here has a value 1, when it should be 0 to make the function mcasp_is_synchronous return 1. Is there something wrong with the device tree that is making this register have this value?

    What exactly sets this register and from where?
  • Parag,

    DTS file seems to be correct, you have "op-mode = <0>;" there. 0 is for i2S mode (ASYNC = 0), while 1 is for DIT/SPDIF mode (ASYNC = 1). You need to debug davinci-mcasp.c file to see if and why DIR/SPDIF mode is selected (instead of I2S).

    &mcasp1 {

    op-mode = <0>;

    }


    static struct davinci_mcasp_pdata *davinci_mcasp_set_pdata_from_of(struct platform_device *pdev)
    {

    ret = of_property_read_u32(np, "op-mode", &val);
    if (ret >= 0)
    pdata->op_mode = val;

    }

    static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *cpu_dai)
    {

    if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE)
            ret = mcasp_dit_hw_param(mcasp, params_rate(params));
        else
            ret = mcasp_i2s_hw_param(mcasp, substream->stream, channels);

    }

    static int mcasp_i2s_hw_param(struct davinci_mcasp *mcasp, int stream, int channels)
    {
    mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC); //ASYNC = 0

    }

    /* S/PDIF */
    static int mcasp_dit_hw_param(struct davinci_mcasp *mcasp, unsigned int rate)
    {

    /* Set the TX clock controls : div = 1 and internal */
    mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE | TX_ASYNC); //ASYNC = 1

    }

  • This is strange. The 4.4 branch of linux kernel (github.com/.../davinci-mcasp.c) that I am using has

    static int mcasp_i2s_hw_param(struct davinci_mcasp *mcasp, int stream, int channels)
    {
    mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC);
    }

    This is clearly setting the bit incorrectly. Why would this set the bit to TX_ASYNC?
  • Parag,

    I can not comment regarding the unknown undefined kernel branch that you are using.

    What I can say is that kernel 4.4.41 that is coming with AM335x TI PSDK v3.03 (link below) is clearing bit ASYNC to 0 for I2S.

    static int mcasp_i2s_hw_param(struct davinci_mcasp *mcasp, int stream, int channels)
    {
    mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC);
    }

    software-dl.ti.com/.../index_FDS.html

    See also:

    processors.wiki.ti.com/index.php

    Build Information

    The kernel git repository, branch and commit id can be found below:
    Based on Version: 4.4.41
    URL: git://git.ti.com/processor-sdk/processor-sdk-linux.git
    Branch: processor-sdk-linux-03.03.00
    Commit ID: f9f6f0db2d5e4f9d2ff46eb31a5a05276a92ed7d


    Regards,
    Pavel
  • Hi Pavel,

    Thanks for your help.

    I finally tried the linux kernel shipped with TI SDK along with the RFS from TI SDK itself, and most of the things (including the bitclock, dataout, etc) seems working in the first instance.

    However I still don't see a proper signal on frame sync on P9_27 (mcasp1_fsx). All I see is that the signal on this pin goes from high to low on start of recording, but does't change. No wave. Is that ok to expect given that I am using a single channel (No of channels in arecord command is 1 by default).

    Even when I try to record using

    arecord -f dat -Dhw:1,0 -c 2 /tmp/audio.wav

    I still don't see a proper high low signal on P9_27. Signal just remains flat.

    Also the recorded file has some data, but what was recorded. Its just completely silent.

  • I just opened the file to see that the data in the recorded file is all zeros :(
  • I just realised that I had configured wrong serializers. I corrected them with

    serial-dir = < /* 1 TX 2 RX 0 unused */
    2 0 0 0
    >;
    And my data pin is configured at P9_41 (mcasp1_axr0)

    The recorded file now has some shrill constant sound (looks like garbage), not what I recorded.

    Any clues?
  • Parag,

    From what I understand, you have the correct and expected clock signal on mcasp1_aclkx pin. But you do not see the correct and expected signal on mcasp1_fsx pin.

    Please change this mcasp1_fsx pin from output to input/output. We have re-time requirement. For more info check AM335x TRM, section 22.2.3 McASP Pin List

    You might observe not expected FSX signal, as it also depends on the data received from mcasp1_axr0 pin. See the timing diagrams:
    AM335x datasheet: Figure 7-86. McASP Input Timing
    AM335x TRM: 22.3.3.1.2 Inter-Integrated Sound (I2S) Format

    "All I see is that the signal on this pin goes from high to low on start of recording, but does't change. No wave."
    If you do not have the proper audio data bits received on mcasp1_axr0, this FSX signal is staying low. You need to receive all audio data bits till LSB.

    Does you Microphone need only these two clock signals (bit clock and frame sync)? Because Audio Codec need one more, MCLK, which can be provided by AHCLKX pin.

    Regards,
    Pavel

  • Pavel,

    What is meant by making the framesync pin INPUT/OUTPUT?

    The current configuration is

    AM33XX_IOPAD(0x9a4,  PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* P9_27 mcasp1_fsx - frame sync */

    Should it be modified to

    AM33XX_IOPAD(0x9a4,  PIN_INPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE3)

    Also I just realised that I am getting the right frameclock as well. I didn't see the written frequency below on the oscilloscope :(. The framesync freq I am getting is 46kz (for mono sound, i.e. c = 1)

    with the following command : arecord -fdat -Dhw:1,0 -c 1  -d 100 /tmp/audio.wav

    With # of channels = 2, the freq still remains the same at 46khz. I don't think its right. Shouldn't the frequency be 48kz for c = 1 and 96khz for c = 2?

    The recorded however seems all garbage :(

    Also another amusing thing is the signal recorded on the data pin is a square wave even when no recording is happening. When I start recording using arecord, the signal shows some small changes in the signal, however they do not seem to go with the sound actually made in the surroundings.

  • My microphone has these pins

    SEL
    LRCL
    DOUT
    BCLK
    GND
    3V

    I have connected all pins except SEL. Not sure if this is needed.
    When I connect SEL to mcasp0_ahclkx (P9_25), I do not see any difference.
  • Parag Sharma said:
    What is meant by making the framesync pin INPUT/OUTPUT?

    These signals (aclkx, fsx) are also used as inputs to re-time or sync data. The associated CONF_<module>_<pin>_RXACTIVE bit for these signals must be set to 1 to enable the inputs back to the module. It is also recommended to place a 33-ohm resistor in series (close to the processor) on each of these signals to avoid signal reflections.

    Parag Sharma said:

    The current configuration is

    AM33XX_IOPAD(0x9a4,  PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* P9_27 mcasp1_fsx - frame sync */

    Should it be modified to

    AM33XX_IOPAD(0x9a4,  PIN_INPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE3)

    AM33XX_IOPAD(0x9a4,  PIN_INPUT_PULLDOWN | MUX_MODE3)

    Then check if bit RXACTIVE is set to 1. See AM335x TRM, section 9.2.2 Pad Control Registers

    Parag Sharma said:
    Also I just realised that I am getting the right frameclock as well.

    If you have the correct bit clock and frame sync output from AM335x McASP, then you should focus on configuration of your external microphone, seems like this microphone is not working properly, thus not providing the correct audio data on AXR pin. You should work with external microphone documents and support team.

    You can also configure AM335x McASP AXR as output, for testing purpose. You can use an o-scope to probe the audio data line and clocks to see that the AM335x McASP driver is working. Then it is up to external microphone to provide correct audio data.

    Regards,
    Pavel

  • Hi Pavel,

    I changed the pixmux settings of framesync and bitclock to INPUT/OUTPUT as you suggested.

    Getting correct Bitclock (1.5MHz), and framesync clock (46.9KHz), but the recorded file is still all garbage as earlier.

    However one interesting observation is that I see a perfectly square wave of frequency 32KHz even when there is no recording going on. Why should the Oscilloscope show this signal? Shouldn't this be all low when not recording or playing?

  • Also to add, the microphone records sound fine with Raspberry pi. So the microphone seem alright.