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PROCESSOR-SDK-AMIC110: DDR-less EtherCAT compilation

Other Parts Discussed in Thread: AMIC110, TIDEP-0105, AM4377

Hello,we are developing EtherCAT with Amic110(DDRless), we have be confused with compile EtherCAT pru;

a)In your document ,Tidep-0105;

you metioned:

Currently, the SBL
(MLO) for DDR-less mode must be built from Processor SDK v4.2, with this patch. The patch is not
required for Processor SDK RTOS v4.3 and later.

It means we could use only sdk v4.2 to use ddrless mode?

b)the sdk v4.2 generates pdk v1.0.9;but in the document it also notes as bellows;

A patch file is included in the PRU-ICSS-ETHERCAT-
SLAVE v1.00.05 package at [INSTALL-

Can the file AM335x_PDK_1_0_8_thumb_mode be used with pdk1.0.9?

c)Because the ethercat package and pdk package are changing with time, we do not known which vertion matches;

And in EtherCAT stack 1.0.5's user guider ,it metion about pdk,Processor SDK RTOS for AM335x 4.1.0:

We use pdk1.0.9 (with  EtherCAT stack 1.0.5')to build ethercat full demo, it reports strange errors;as we tried ,unmatched vertions lead to strange errors;

d)CAN you provide a file with every stack or file matched to ensure a correct Project;And Your document  now are not  explicit  to us.

or CAN you provide a ddrless project which i only need to compile it and we can use it,we do not even need to download pdk or patch file;It is possible because we have tried in 

other project.Other company's mcu is more easy to use(for example stm32).


  • The RTOS team have been notified. They will respond here.
  • Wei,

    For the EtherCAT DDR-less mode SBL on AMIC110, please refer to the thread -
    Unfortunately SBL is still broken in PRSDK 4.3.

    For the EtherCAT 'app' build, you can either use default PRSDK4.1 (PDK 1.0.8) or follow the section -
    to build on top of PRSDK 4.2 (PDK 1.0.9).

    You have to download PRSDK to build EtherCAT project as there are many dependent components from PRSDK.

  • I used patch cmd to patch file to pdk 4.2,but it reports error as following:

    patch.exe -i C:\ti\PRU-ICSS-EtherCAT_Slave_01.00.05.00\PRSDK_4_2_migration_patch\PRSDK_4_2_migration.patch -d C:\ti\PRU-ICSS-EtherCAT_Slave_01.00.05.00 -p0

    patch.exe -i C:\ti\PRU-ICSS-EtherCAT_Slave_01.00.05.00\PRSDK_4_2_migration_patch\PRSDK_4_2_migration.patch -d C:\ti\PRU-ICSS-EtherCAT_Slave_01.00.05.00 -p1

    Is there any problem with my word?Thank you!

  • Wei,

    Did you run 'unix2dos.exe' to the patch file before applying? This is same as described in the section - Applying a Patch file.

  • Thank you very much! i will try!
  • Thanks for your help. I have already compiled all the file and burned it to my flash;
    In the way of flashing, i found a problem with you flash_writer_tool:
    It uses ddr-ram's 0xc0000000 region(maybe it is not reasonable);But my board has no ddr, so it crashes when go to the adress;
    After i repaired it , i can burn files to flash;

    But i still have another question,i have burned all files to board and i can not scan device using twincat;
    And if i use xds-100v3 to monitor the amic110; it stops at 0x24b1e,0x2375a,0x2377a.... so the program is running ..
    But i don't known where it goes;

    I want to known where the problem it is;Because our board has no ddr, i can't debug with souce code;
    Having you get any methord to debug the code without ddr?

    Looking forward for your Reply!
  • Hi Wei,

    Good catch on the flash_write_tool! It was missed as we have been developing on AMIC110 ICEv2 which really has DDR on board.

    To debug the code without DDR, you may follow the steps below:
    1. Create a CCS target configuration file without GEL script attached, i.e. select AMIC110 instead of ICE_AMIC110 as device, thus when you connect the A8 core, the device won't be reset. The MLO will have the device/board initialized.

    2. Connect A8 core, verify the tiesc_eeprom.bin, ecat_frame_handler.bin and ecat_host_interface.bin have been correctly written to on-chip memory as shown here
    Note: _ti.bin files have 8 byte header (length, address), so if you compare the memory with _ti.bin, ignore the beginning 8 bytes in _ti.bin files.
    Also, you have to connect and halt PRU cores to check the PRU memory if checking from A8 core with PRU global address 0x4a334000, 0x4a338000.

    3. Load the *symbols* of .out file then you should be to locate the function the A8 core is running into.

    4. The default ethercat_slave_full_AMIC110_arm still have more on-chip memory unused, So if you build the project without optimization in release mode, i.e. -O0 and generate debug information (-g), the application still can be fit into (flashed), which may help debug too.

    5. Ideally you should prototype your application on AMIC110 ICE v2, and your debug focus would be on your own board bring up, pinmux and PHY configuration if not using DP83822.

  • Yesterday, i tried to flash all ti_bin files and erash all flash files,but i found that when i debug with xds100v3, it always runs at section 0x20000 section(for example 0x23000);

    a)It seems that  it is not the address of the bootloader(bootloader_boot_mcspi_noDDR_a8host_release_ti.bin),becuase i can see from .map file that all funciton inside it is above 0x40000000 ;

    So it hasn't go to the bootloader yet;But the same file is ok with you ic1100 board;

    So the problem is why it can't go to bootloader;

    our sysboot are as following;

    Is there any reason wich can lead to fail of start of bootloader?

    b)By the way, the flash chip we use is not in the scope of flash writer tool supproted flash chip list;

    I added it bymyself, so i can use the flash writer to writer ti.bin;

    Do i need to modify the bootloader source to support the flash chip?

  • Wei,

    Did you refer to the thread to update/rebuild boot loader for DDR-less AMIC110? 

    If so, you can also try to build a debug version SBL and try to step into the second boot loader code to see how it jumps back to ROM boot loader.



  • i had already rebuild the sbl with your instructions;

    I am be in touch with Denny yang,I asked him for his bin files;

    i used Denny yang's bin files instead of mine, it's the same;

  • i have already generated the sbl(bootloader_boot_mcspi_noDDR_a8host_debug_ti.bin);

    But I don't known how to debug it;

    Because whether i flash the sbl to flash or i erase all the flash, when i power on the board again;

    It's adress is always 0x20000(in the range of first bootloader);

    Then i load the bootloader_boot_mcspi_noDDR_a8host_debug_ti.out, the emulator reports a error:

    I used digital scope to monitor the clk of spi when the board power, we can see short period of clk signal,

    So ,is ther any way to let the cpu halt when it goes to second bootloader?so i can debug it with .out file;

    Or Should we debug the first bootloader to known whether the program has ever entered the sbl or not;

  • Hi Wei,

    You can change the PC register to 0x402F0400 which is the starting address of SBL to debug if the boot loader has been flashed. Or load the bootloader_boot_mcspi_noDDR_a8host_debug.out instead of bootloader_boot_mcspi_noDDR_a8host_debug_ti.out which has extra 8 bytes header (length, loading address for flash write) to debug SBL.

  • a)It seems that i have been flashed all the file successfully to the flash;

    When i debug the board after power on ,it goes to adress 0x40308004, and can't go out;

    I am using the bootloader i compiled myself so that i can see which function it goes;

    I debug it with .out;

    Is there any way i can debug like we use in ddr?

    Now it's complex to find out where the problem it is;it only goes to  fucntion and can't  get detail lines;

    B)I can't debug to see where the prebuild app goes because there is  not .out file in prebuild folder;

    The prebuild app seems goes to different adresses than my app;

    C)But the above two apps seems to be not correct,because i can't scan device using twincat;

  • By the way,The Ethercat_slave_demo is built with release config;
    I can use this app to debug it ;
    But when i change the project to debug config , the .out and map file it genereates has adress with 0x80000000 more;
    Does i need to modify other attributes to make it ok?
    Does the debug vertion can help to debug the code more easily?
  • Wei,

    Which type of PHY is used in your custom board? Is it a TI PHY? If not, you may need update the hard-coded 0x2000 in the function MDIO_getPhyIdentifyStat( ) which to indicate the PHY is present. You may find the PHY app note help -

    Ethercat_slave_demo project debug mode uses DDR. You can similarly re-build the project with release DDR-less mode, but disable compiler optimization option to debug.

  • Part Number: PROCESSOR-SDK-AMIC110

    I changed the eth demo project to my borad with my pinmux and phy adress;

    i have confirmed the phy reset and phy adress .

    Now with my board, i can't scan EtherCAT device under the following situation:

    The code  stays in the pic bellow:Whether i use the flash writer tool to flash the app or use the simulator to directly load it to ram;

    But when i download the amic110 ethercat slave demo app to 0x20000;

    Then repower  on and then i use simulator to load  my own program (app) directly to  ram;

    Then the program was able to pass the mdio communication part and go to ehtercat task;

    And i was able to scan devices via twincat;

    But i wasn't sure about where the different is,

    So can you help me finding out where the problem is?

    Thanks a lot!

  • Wei,

    When you have amic110 ethercat slave demo app flashed to 0x20000 and power cycle, the default pinmux and initialization will take effect, which may get your app pass MDIO communication by coincidence. Can you try to erase all flash, and then download your app from CCS and check if Board_getPhyIdentifyStat() is stuck at CSL_MDIO_phyRegRead() or returned regStatus not equal to the hard coded 0x2000?

  • Hello wei I want to know if your AMIC110-ICE works in DDRless mode? Can twincat scan to TIESC-001? I configured AMIC11x arm ethercat_slave_full project to connect to the emulator in debug mode, working properly TWINCAT can scan to TIESC-001, I use the version is CCS7.2 SDK4.1 PRU-ICSS1.0.5 I guess the problem you encountered is also in MLO file.are you chinese?
  • I am chinese,.I have some problems with ddr-less mode with our board(DDR-Less);In certain situation , i can scan ties,But when i dowload the app to flash ,it can't pass the phy -read progress;

    I will go and find where the problem is.

    Thank you for advising!

  • I will try your suggestion;But with the demo app's pinmux and intialzation should not be correct for our own board, but the fact is after using this app, then i can pass the phy read. it's so strange.
  • I have erased all flash , and download all ti.bin except for my app; Then i use emulator to emulat it, it still stucks in phy_read..
  • hello wei I am also using this development board, maybe we have the same problem, can you leave a call, we can communicate about this development board, my name is Zhou Peng, this is my mobile number 15811193667
  • a)Now i have found out  why i stuck in phy_read , it's not caused by pinmuxdata.c or hardware, the file of my config and the hardware is correct; 

    It is caused by other files, it's so strange that the following position influences phy_read;It takes me much time to find out this;(our board doen't have gpio 2 3, or uart);

    Now i was able to pass the phy_read positon and cotinue running;

    B)By my test , i found that  when i load program by simulator the first time  it runs normally,  when i load it the second time , it goes to error!

    Is it normal?

    C) I test the app in the follwing two modes:

    1)i download  bootloader   esi_eeprom    eth_frame  eht_host to flash(without app);

    When load the app by simulator , it stuck in  esi eeprom crc error; then i can't scan twincat devices;

    It seems that  using simulator to load app lead to fail of  copy of  file from flash to  program.Or  it is caused by other reason?

    when i load the app again , it goes to error;

    2. i use flash to flash the above 4 files ,together with my app;

    When it power on, i use simulator to  simualtor it, i found that it goes normally without esi eeprom error;

    But i can't scan ethercat devieces with my board;

    When i load the app using the simulator, and runs the program again, i can scan ethercat devices;

    The program in the flash to first run after power on is the same with the app i load using simulator;

    Why  i use simulator to load the same progam lead to success?I can't tell the reason.


    CAN you help me to sovle these problems; It 's so different to  find out the problem compared to other ethercat mcus especially in ddr-less mode;

    Best  regrads!

  • Wei,

    The EtherCAT on AMIC110 project by default uses DDR in CCS debug mode. Does it work on your board without any problem e.g. to reload app? The DDR (debug) mode doesn't require any binaries flashed and easier to debug if any hardware/pinmux configuration issue.

    Have you done 'system reset' when restarting the code in CCS?
    After you flash the app and not able to scan the device, have you tried to connect CCS (without GEL script) to see when it's stuck?
    You may refer to the memory map ( ) to ensure the firmware binaries and eeprom being flashed and booted up correctly by SBL.

  • a)our own amic110 borad have no ddr, so i can't use ddr mode to debug, i know it's more easy;

    Our another board with ddr(am4377) 's EtherCAT function is working now;

    b)As i metioned before,  when i have tried to connect the app flahsed board without gel , it's running normal ,and have passed all initial process(including phy communication and xml emualted eeprom read);

    But  because i am not familar with your ethercat pru program and without ddr it's complex to debug program , i don't know where the problem it is that lead me to fail of scanning ethercat devices;

  • Garrett,

    Garrett Ding said:
    You can change the PC register to 0x402F0400 which is the starting address of SBL to debug if the boot loader has been flashed.

    What is the Entry point of the app, since SBL is overlapped with app after app boot up, I think we may need to manually set PC to app entry point to see whether can run up.

  • Tony,

    The .bss section of the app is overlapped with SBL as the .bss section is used after SBL has booted up the app.

    The entry point can be found from memory map:

    .c_int00 0x402f5900 0xb4

  • >>It seems that  using simulator to load app lead to fail of  copy of  file from flash to  program.Or  it is caused by other reason?

    Do you have the macro AMIC11X_ONCHIP_MEM_MODE defined in your project? tiesc_eeprom is loaded from flash to 0x4030F400 by DDR-less SBL, so it doesn't need to be re-load from the application bsp_eeprom_emulation_init(), see

    void bsp_eeprom_emulation_init(void)



    Regards, Garrett