Hello TI E2E,
Reading the data sheet for AM3358-EP Sitara™ Processors (SLUSC35A –APRIL 2015) I'm looking at configuring the SPI bus for reading and writing to FLASH memory. On Table 4.1 pin B16 for SPI0_D1 it gives: BALL RESET STATE =Z
BALL REST REL. STATE = H
RESET REL. MODE = 7
So I've searched the document but it does not tell me, what is "mode 7" ?
Thanks for your help in advance.
Regards Amin