Other Parts Discussed in Thread: SYSCONFIG
I have a question. I am enabling the GPMC Module in the Am335x using the usual methodology which everybody else appears to be using, however when I attempt to access any register within the GPMC Register suit, I get a bus fault, and that usually only happens if the GPMC Module's clock has not been enabled.
HWREG(SOC_PRCM_REGS + CM_PER_GPMC_CLKCTRL) |= CM_PER_GPMC_CLKCTRL_MODULEMODE_ENABLE;
while ((HWREG(SOC_PRCM_REGS + CM_PER_GPMC_CLKCTRL) & CM_PER_GPMC_CLKCTRL_IDLEST) !=
(CM_PER_GPMC_CLKCTRL_IDLEST_FUNC << CM_PER_GPMC_CLKCTRL_IDLEST_SHIFT))
{
// Do Nothing - Check to see if clocks are enabled
}
HWREG(SOC_GPMC_0_REGS + GPMC_SYSCONFIG ) |= GPMC_SYSCONFIG_SOFTRESET; <-- This throws exception
The attempt to write at address 0x50000010 (GPMC Registers plus the SysConfig offset of 0x10) results in a bus fault, I acquire an exception.
QUESTION: Is a possible reason due to my not having the GPMC Pin Muxing set correctly? Presumably I should be able to access registers within the GPMC Module without the muxing being perfectly correct, right? As it is I have no idea on why I get a fault accessing register address 0x50000010 inasmuch as the code I'm using appears to be working everywhere else, doing Google searches and examining TI demo code.
My supposition is that pin muxing is not the issue, however my pin configuration should be golden:
#define GPMC_PINS \
PIN(GPMC_CLK, MUX_MODE_7, PULL_NONE, RX_ON), /* GPIO2_1 - FPGA_INT_0 */ \
PIN(GPMC_BE0N_CLE, MUX_MODE_7, PULL_NONE, RX_ON), /* GPIO2_5 - SYNC_A */ \
PIN(GPMC_CSN(0), MUX_MODE_0, PULL_NONE, RX_OFF), /* gpio1_29 - GPMC_CS0n */ \
PIN(GPMC_CSN(1), MUX_MODE_7, PULL_NONE, RX_ON), /* gpio1_30 - GPMC_CS0n */ \
PIN(GPMC_CSN(2), MUX_MODE_7, PULL_NONE, RX_ON), /* gpio1_31 - GPMC_CS0n */ \
PIN(GPMC_CSN(3), MUX_MODE_7, PULL_NONE, RX_OFF), /* gpio2_0 - GPMC_CS0n */ \
PIN(GPMC_A(1), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio1_17 - GPMC_A1 */ \
PIN(GPMC_A(2), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio1_18 - GPMC_A2 */ \
PIN(GPMC_A(3), MUX_MODE_7, PULL_NONE, RX_OFF), /* GPIO1_19 - PROGRAM_B */ \
PIN(GPMC_A(4), MUX_MODE_7, PULL_NONE, RX_ON), /* GPIO1_20 - DONE_B */ \
PIN(GPMC_A(5), MUX_MODE_7, PULL_NONE, RX_ON), /* GPIO1_21 - INIT_B */ \
PIN(GPMC_A(8), MUX_MODE_7, PULL_DOWN, RX_OFF), /* GPIO1_24 - A8 LED3 */ \
PIN(GPMC_A(9), MUX_MODE_7, PULL_DOWN, RX_OFF), /* GPIO1_25 - A8 LED1 */ \
PIN(GPMC_A(10), MUX_MODE_7, PULL_DOWN, RX_OFF), /* GPIO1_26 - A8 LED0 */ \
PIN(GPMC_A(11), MUX_MODE_7, PULL_DOWN, RX_OFF), /* GPIO1_27 - A8 LED2 */ \
PIN(GPMC_AD(15), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio1_15 - GPMC_D15 */ \
PIN(GPMC_AD(14), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio1_14 - GPMC_D14 */ \
PIN(GPMC_AD(13), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio1_13 - GPMC_D13 */ \
PIN(GPMC_AD(12), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio1_12 - GPMC_D12 */ \
PIN(GPMC_AD(11), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio0_27 - GPMC_D11 */ \
PIN(GPMC_AD(10), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio0_26 - GPMC_D10 */ \
PIN(GPMC_AD(9), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio0_23 - GPMC_D9 */ \
PIN(GPMC_AD(8), MUX_MODE_0, PULL_NONE, RX_ON), /* pio0_22 - GPMC_D8 */ \
PIN(GPMC_AD(7), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio1_7 - GPMC_D7 */ \
PIN(GPMC_AD(6), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio1_6 - GPMC_D6 */ \
PIN(GPMC_AD(5), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio1_5 - GPMC_D5 */ \
PIN(GPMC_AD(4), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio1_4 - GPMC_D4 */ \
PIN(GPMC_AD(3), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio1_3 - GPMC_D3 */ \
PIN(GPMC_AD(2), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio1_2 - GPMC_D2 */ \
PIN(GPMC_AD(1), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio1_1 - GPMC_D1 */ \
PIN(GPMC_AD(0), MUX_MODE_0, PULL_NONE, RX_ON), /* gpio1_0 - GPMC_D0 */ \
PIN(GPMC_WAIT0, MUX_MODE_0, PULL_UP, RX_ON), /* gpio0_30 - GPMC_WAIT */ \
PIN(GPMC_ADVN_ALE, MUX_MODE_0, PULL_UP, RX_OFF), /* gpio2_2 - GPMC_ALE */ \
PIN(GPMC_BE1N, MUX_MODE_0, PULL_UP, RX_OFF), /* gpio1_28 - GPMC_BE1n */ \
PIN(GPMC_WEN, MUX_MODE_0, PULL_UP, RX_OFF), /* gpio2_4 - GPMC_WRTn */ \
PIN(GPMC_WPN, MUX_MODE_0, PULL_UP, RX_OFF), /* GPMC_WPN - */ \
PIN(GPMC_OEN_REN, MUX_MODE_0, PULL_UP, RX_OFF) /* GPMC_OEn - */ \
Can anyone suggest a reason why I experience a bus fault / exception when accessing the internal GPMC register?
Thanks!
