TMS320C6424: Lack of complete documentation to implement NAND Boot

Hello Yordan,

looks like I have boot rom version 1.40. Check out a screen shot:

Hi,

> (no debug options)

well, I guess that boot rom is build with optimization disabled. Check out following assembler lines from the boot rom:

Very same constant has been calculated 2 times in row and put into A4 at lines 0x00100394 and 0x001003a8. This code looks for me like

if (fnc_ptr) {
    fnc_ptr();
}

where calculated constant is fnc_ptr address. I would expected this to be optimized into a single const calculation instead for C code. Not sure this guess is correct though.

Regards,

Kirill

Dear Rahul Prabhu,

> Is this a new C6424 based design or are you running into this issue on an existing design?

As I said already this is a new design. I have selected the DSP because of PCI bus with master mode present. I hope you can still answer a few more questions though. Otherwise I will have to dig into ROM code assembly...

> but due to limited expertise around these older DSP parts

I completely understand your reasons for this. This is why I suggested sharing ROM code.

> C6424 uses the same ROM as DM6437 device

This is very valuable information. Thank you!

Searching internet for open information about programming NAND on these old TI DSP I came across this https://github.com/virt2real/dm36x-flash-utils/blob/master/DM643x/Common/src/device_nand.c

2. "Large" (see source code) page flash: I have 2048 B per page flash

For these assumptions I got following:

1. All AIS is written in little endian bytes order to NAND
2. All NAND related meta data is written in little endian bytes order except ECC
3. Separate ECC value per 512 Bytes, 4 ECC values for 2KB page
   
4. AIS number of pages: actual number of pages (AIS image / 2KB for me)
5. AIS block start: actual start block (block 0 is not allowed in ROM code)
6. AIS page start: always zero

Check out my spare area layout that worked for me:

#define TI_BAD_BLOCK_MARK	(0xBADDBADD)

// Make sure you have 4 bytes align here
struct nand_ti_ecc {
	uint32_t onfi_meta; // See ONFI spec on Bad block identification
	uint32_t ti_bad_block_mark;
	uint32_t ti_ecc; // Bytes are swapped here regardless of endianess!
	uint32_t reserved;
};

// Spare area layout for 2048 Bytes page
struct nand_ti_ecc ti_spare_area[4];