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Linux/AM3359: PRU Remoteproc

Part Number: AM3359

Tool/software: Linux

Hello all,

                                 I'm working on a custom board based on am335x ice v2.I want to toggle gpio pins at 12MHz.I have learnt that this is not achievable with cortex a8 because of the slow l4 interconnect.We have decided to use PRU cores for achieving this.I want to use Togglegpio application which comes with the SDK.But after booting im not able to see "/sys/class/remoteproc/remoteproc1"  and "/sys/class/remoteproc/remoteproc2" in the sysfs entry.However there is remoteproc0.How to enable remoteproc1 and remoteproc2?

dts file:

8053.dts.txt
/*
 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/*
 * AM335x ICE V2 board
 * http://www.ti.com/tool/tmdsice3359
 */

/dts-v1/;

#include "am33xx.dtsi"
#include "am335x-pru-uio.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	model = "TI AM3359 ICE-V2";
	compatible = "ti,am3359-icev2", "ti,am33xx";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	chosen {
		stdout-path = &uart0;
	};

	vbat: fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};

	vtt_fixed: fixedregulator1 {
		compatible = "regulator-fixed";
		regulator-name = "vtt";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		gpio = <&gpio0 18 GPIO_ACTIVE_HIGH>;
		regulator-always-on;
		regulator-boot-on;
		enable-active-high;
	};
/*
	leds-iio {
		status = "disabled";
		compatible = "gpio-leds";
		led-out0 {
			label = "out0";
			gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led-out1 {
			label = "out1";
			gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led-out2 {
			label = "out2";
			gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led-out3 {
			label = "out3";
			gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led-out4 {
			label = "out4";
			gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led-out5 {
			label = "out5";
			gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led-out6 {
			label = "out6";
			gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led-out7 {
			label = "out7";
			gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};
	};

	
	gpio-decoder {
		compatible = "gpio-decoder";
		gpios = <&pca9536 3 GPIO_ACTIVE_HIGH>,
			<&pca9536 2 GPIO_ACTIVE_HIGH>,
			<&pca9536 1 GPIO_ACTIVE_HIGH>,
			<&pca9536 0 GPIO_ACTIVE_HIGH>;
		linux,axis = <0>; /* ABS_X *//*
		decoder-max-value = <9>;
	};
*/
	
};

&am33xx_pinmux {

	i2c0_pins_default: i2c0_pins_default {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0) /* (C17) I2C0_SDA.I2C0_SDA */
			AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0) /* (C16) I2C0_SCL.I2C0_SCL */
		>;
	};

	i2c2_pins_default: i2c2_pins_default {
                pinctrl-single,pins = <
                        AM33XX_IOPAD(0x97C, PIN_INPUT | MUX_MODE3) /* (D17) I2C2_SDA.I2C2_SDA */
                        AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE3) /* (D18) I2C2_SCL.I2C2_SCL */
                >;
        };

	gpio0_pins_default: gpio0_pins_default {
		pinctrl-single,pins = <
	/*		AM33XX_IOPAD(0x944, PIN_INPUT | MUX_MODE7)*/ /* (H18) rmii1_refclk.gpio0[29] */
		>;
	};
	
	gpio1_pins_default: gpio1_pins_default {
		pinctrl-single,pins = <
		/*	AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLUP | MUX_MODE7)*/ /* (T15) M1 gpmc_a7.gpio1[23] */
		/*	AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7)*/ /* (V16) M2 gpmc_a8.gpio1[24] */
		/*	AM33XX_IOPAD(0x868, PIN_OUTPUT_PULLUP | MUX_MODE7)*/ /* (T16) gpmc_a10.gpio1[26] */
		>;
	};
	gpio2_pins_default: gpio2_pins_default {
		pinctrl-single,pins = <
	/*		AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7)*/ /* (R6) M0 lcd_ac_bias_en.gpio2[25]*/ 
	/*		AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLDOWN | MUX_MODE7)*/ /* (F17) mmc0_dat3.gpio2[26] */
	/*		AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLDOWN | MUX_MODE7)*/ /* (G15) mmc0_dat1.gpio2[28] */
	/*		AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLDOWN | MUX_MODE7) *//* (G16) mmc0_dat0.gpio2[29] */

		>;
	};	

	spi0_pins_default: spi0_pins_default {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */
			AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
			AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
			AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
			AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE0) /* (C15) spi0_cs1.spi0_cs1 */
			AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7) /* (B12) mcasp0_aclkr.gpio3[18] */
		>;
	};	
	 spi1_pins_default: spi1_pins_default {
		pinctrl-single,pins = <
		AM33XX_IOPAD(0x990, PIN_INPUT_PULLUP | MUX_MODE3) /* (A13) mcasp0_aclkx.spi1_sclk */
		AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE3) /* (B13) mcasp0_fsx.spi1_d0 */
		AM33XX_IOPAD(0x998, PIN_INPUT_PULLUP | MUX_MODE3) /* (D12) mcasp0_axr0.spi1_d1 */
		AM33XX_IOPAD(0x99c, PIN_INPUT_PULLUP | MUX_MODE3) /* (C12) mcasp0_ahclkr.spi1_cs0 */
		>;
	};


	/*DEBUG UART*/
	uart0_pins_default: uart0_pins_default {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* (E15) uart0_rxd.uart0_rxd */
			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLUP | MUX_MODE0) /* (E16) uart0_txd.uart0_txd */
		>;
	};
	

	/*FPGA PROC UART*/
	uart4_pins_default: uart4_pins_default {
	pinctrl-single,pins = <
		AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE1) /* (E18) uart0_ctsn.uart4_rxd */
		AM33XX_IOPAD(0x96c, PIN_OUTPUT_PULLUP | MUX_MODE1) /* (E17) uart0_rtsn.uart4_txd */
	>;
	};


	/*HSKP UART FROM GCM TO SGCM*/
	uart1_pins_default: uart1_pins_default {
	pinctrl-single,pins = <
		AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* (D16) uart1_rxd.uart1_rxd */
		AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLUP | MUX_MODE0) /* (D15) uart1_txd.uart1_txd */
	>;
	};

	

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
				/* Slave 1 */
		AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
		AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
		AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
		AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
		AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
		AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_td0 */		       

                AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
		AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rgmii1_rclk */
		AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
		AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
		AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
		AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
		AM33XX_IOPAD(0xA34, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (F15) USB1_DRVVBUS.gpio3[13] */
	>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
		AM33XX_IOPAD(0x914, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (J16) gmii1_txen.rgmii1_tctl */
		AM33XX_IOPAD(0x918, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (J17) gmii1_rxdv.rgmii1_rctl */
		AM33XX_IOPAD(0x92c, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (K18) gmii1_txclk.rgmii1_tclk */
		AM33XX_IOPAD(0x930, (PIN_INPUT_PULLDOWN | MUX_MODE7)) /* (L18) gmii1_rxclk.rgmii1_rclk */
		AM33XX_IOPAD(0x928, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (K17) gmii1_txd0.rgmii1_td0 */
		AM33XX_IOPAD(0x924, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (K16) gmii1_txd1.rgmii1_td1 */
		AM33XX_IOPAD(0x920, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (K15) gmii1_txd2.rgmii1_td2 */
		AM33XX_IOPAD(0x91c, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (J18) gmii1_txd3.rgmii1_td3 */
		AM33XX_IOPAD(0x940, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (M16) gmii1_rxd0.rgmii1_rd0 */
		AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (L15) gmii1_rxd1.rgmii1_rd1 */
		AM33XX_IOPAD(0x938, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (L16) gmii1_rxd2.rgmii1_rd2 */
		AM33XX_IOPAD(0x934, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (L17) gmii1_rxd3.rgmii1_rd3 */
		AM33XX_IOPAD(0xA34, PIN_OUTPUT_PULLDOWN | MUX_MODE7)	

		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			AM33XX_IOPAD(0x948, (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0))	/* mdio_data.mdio_data */
			AM33XX_IOPAD(0x94c, (PIN_OUTPUT_PULLUP | MUX_MODE0))			/* mdio_clk.mdio_clk */
	
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			AM33XX_IOPAD(0x948, (PIN_INPUT_PULLDOWN | MUX_MODE7))
			AM33XX_IOPAD(0x94c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
		>;
	};
	
	pruss_pins:pruss_pins {
		pinctrl-single,pins = <
	                AM33XX_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE5)       /* LCD_DATA1 */
	                >;
	};
        
	nandflash_pins_s0: nandflash_pins_s0 {
                pinctrl-single,pins = <
                        AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad0.gpmc_ad0 */
                        AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad1.gpmc_ad1 */
                        AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad2.gpmc_ad2 */
                        AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad3.gpmc_ad3 */
                        AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad4.gpmc_ad4 */
                        AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad5.gpmc_ad5 */
                        AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad6.gpmc_ad6 */
                        AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad7.gpmc_ad7 */
			AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE0)	/*gpmc_ad8.gpmc.ad8*/
			AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE0)	/*gpmc_ad9.gpmc.ad9*/
			AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE0)	/*gpmc_ad10.gpmc.ad10*/
			AM33XX_IOPAD(0x82C, PIN_INPUT_PULLUP | MUX_MODE0)	/*gpmc_ad11.gpmc.ad11*/
			AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE0)	/*gpmc_ad12.gpmc.ad12*/
			AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE0)	/*gpmc_ad13.gpmc.ad13*/
			AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE0)	/*gpmc_ad14.gpmc.ad14*/
			AM33XX_IOPAD(0x83C, PIN_INPUT_PULLUP | MUX_MODE0)	/*gpmc_ad15.gpmc.ad15*/
	
			AM33XX_IOPAD(0x878, PIN_OUTPUT_PULLUP | MUX_MODE0)	/*gpmc_ben1*/
			AM33XX_IOPAD(0x884, PIN_OUTPUT_PULLUP | MUX_MODE0)	/*gpmc_csn2*/
			AM33XX_IOPAD(0x888, PIN_OUTPUT_PULLUP | MUX_MODE0) 	/* (T13) gpmc_csn3.gpmc_csn3 */
			AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP  | MUX_MODE0)	/*gpmc_csn1.gpmc_csn1*/
			AM33XX_IOPAD(0x88C, PIN_INPUT | MUX_MODE0)		/*gpmc_clk.gpmc_clk*/

                        AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_wait0.gpmc_wait0 */
                        AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_wpn.gpio0_30 */
                        AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE0)     /* gpmc_csn0.gpmc_csn0  */
                        AM33XX_IOPAD(0x890, PIN_OUTPUT_PULLUP | MUX_MODE0)     /* gpmc_advn_ale.gpmc_advn_ale */
                        AM33XX_IOPAD(0x894, PIN_OUTPUT_PULLUP | MUX_MODE0)     /* gpmc_oen_ren.gpmc_oen_ren */
                        AM33XX_IOPAD(0x898, PIN_OUTPUT_PULLUP | MUX_MODE0)     /* gpmc_wen.gpmc_wen */
                        AM33XX_IOPAD(0x89c, PIN_OUTPUT_PULLUP | MUX_MODE0)     /* gpmc_be0n_cle.gpmc_be0n_cle */

                >;
        };
};

/*********Added by Chinmay***********/
&pruss_soc_bus {
	status = "okay";

	
};

&pruss{
	pinctrl-names = "default";
	pinctrl-0 = <&pruss_pins>;
	status = "okay";
};


&pru0{
	status = "okay";
};

&pru1{
	status = "okay";
};

/**************************************/


&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins_default>;

	status = "okay";
	clock-frequency = <400000>;

	tps: power-controller@2d {
		reg = <0x2d>;
	};
/*
	tpic2810: gpio@60 {
		compatible = "ti,tpic2810";
		reg = <0x60>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	pca9536: gpio@41 {
		compatible = "ti,pca9536";
		reg = <0x41>;
		gpio-controller;
		#gpio-cells = <2>;
	};
*/
};

/*
&i2c1{
        compatible = "ti,omap4-i2c";
        #address-cells = <1>;
        #size-cells = <0>;
        ti,hwmods = "i2c2";
        reg = <0x4802a000 0x1000>;
        interrupts = <71>;
        status = "okay";
		ad7414@48 {
			compatible = "analog,ad7414";
        		reg = <0x48>;
      		  	status = "okay";
    			};
      };
*/

&i2c2{
        pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins_default>;

	status = "okay";
	clock-frequency = <500000>; /*for 400KHz added by Chinmay*/ 
		/*ad7414@4A {
			compatible = "analog,ad7414";
        		reg = <0x4A>;
      		  	status = "okay";
    			};*/
};

&spi0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_pins_default>;

	/*
	sn65hvs882@1 {
		compatible = "pisosr-gpio";
		gpio-controller;
		#gpio-cells = <2>;

		load-gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;

		reg = <1>;
		spi-max-frequency = <1000000>;
		spi-cpol;
	};
	*/
	/*spi_nor: flash@0 { */
	spi_fpga@1 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "linux,spidev";	
		/*compatible = "winbond,w25q64", "jedec,spi-nor" , "linux,spidev";*/
		spi-max-frequency = <20000000>;  /* 20 mhz */
		m25p,fast-read;
		reg = <1>;



	};

};

&spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins_default>;
	

	spidev@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "n25q256","jedec,spi-nor";
		/*compatible = "linux,spidev";*/
		spi-max-frequency = <2000000>;
		m25p,fast-read;
		reg = <0x0>;

		partition@0 {
			label = "spi1_partition";
			reg = <0x0 0x2000000>;
		};
	};
};

/*
&spi1
{
    pinctrl-names = "default";
    pinctrl-0 = <&spi1_pins_default>;
    ti,pindir-d0-out-d1-in = <1>;
     status = "okay";
     spidev@0
        {
          #address-cells = <1>;
          #size-cells = <0>;
          compatible ="rohm,dh2228fv";
          spi-max-frequency = <48000000>;
          reg = <0x0>;
        };

};
*/
&tscadc {
	status = "okay";
	adc {
		ti,adc-channels = <1 2 3 4 5 6 7>;
	};
};

#include "tps65910.dtsi"

&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	regulators {
		vrtc_reg: regulator@0 {
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1326000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1144000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};
	};
};


&gpio0 {
	/* Do not idle the GPIO used for holding the VTT regulator */
	ti,no-reset-on-init;
	ti,no-idle-on-init;
/*	pinctrl-names = "default";
	pinctrl-0 = <&gpio0_pins_default>;*/
	p7 {
		gpio-hog;
		gpios = <7 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "FET_SWITCH_CTRL";
	};	
};

&gpio1 {
	/* Do not idle the GPIO used for holding the VTT regulator */
	ti,no-reset-on-init;
	ti,no-idle-on-init;
/*	pinctrl-names = "default";
	pinctrl-0 = <&gpio1_pins_default>;*/
	status = "okay";
};

&gpio2 {
	/* Do not idle the GPIO used for holding the VTT regulator */
	ti,no-reset-on-init;
	ti,no-idle-on-init;
/*	pinctrl-names = "default";
	pinctrl-0 = <&gpio2_pins_default>;*/
	status = "okay";

};

/*DEBUG UART*/
&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins_default>;
	status = "okay";
};


/*FPGA UART*/
&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart4_pins_default>;
	status = "okay";
};


/*HSKP UART*/
&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins_default>;
	status = "okay";
};


&mac {
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&cpsw_default>;
    pinctrl-1 = <&cpsw_sleep>;
    status = "okay";
};

&davinci_mdio {
    pinctrl-names = "default", "sleep";
    compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
    pinctrl-0 = <&davinci_mdio_default>;
    pinctrl-1 = <&davinci_mdio_sleep>;
    status = "okay";

    dp83867_0: ethernet-phy@0 {
        reg = <0>;
        ti,rx-internal-delay = <DP83867_RGMIIDCTL_4_00_NS>;
        ti,tx-internal-delay = <DP83867_RGMIIDCTL_4_00_NS>;
        ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
        ti,min-output-impedance;
        ti,dp83867-rxctrl-strap-quirk;
    };

};

&cpsw_emac0 {
    phy_id = <&davinci_mdio>, <0>;
    phy-mode = "rgmii-id";
};


/*
&cpsw_emac1 {
    phy_id = <&davinci_mdio>, <0>;
    phy-mode = "rgmii";
  
};
*/

&elm{
status = "okay"; 
};

&gpmc {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&nandflash_pins_s0>;
	ranges = <0 0 0x08000000 0x01000000>,	/*CSn0 for NAND*/
        	 <2 0 0x09000000 0x01000000>;   /*CSn2 for FPGA*/
	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
		ti,nand-xfer-type = "prefetch-dma";
		ti,nand-ecc-opt = "bch8";
		ti,elm-id = <&elm>;
		nand-bus-width = <16>;
		gpmc,device-width = <1>;
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-on-ns = <0>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		/* MTD partition table */
		/* All SPL-* partitions are sized to minimal length
		 * which can be independently programmable. For
		 * NAND flash this is equal to size of erase-block */
		#address-cells = <1>;
		#size-cells = <1>;
		partition@0 {
			label = "NAND.SPL";
			reg = <0x00000000 0x000020000>;
		};
		partition@1 {
			label = "NAND.SPL.backup1";
			reg = <0x00020000 0x00020000>;
		};
		partition@2 {
			label = "NAND.SPL.backup2";
			reg = <0x00040000 0x00020000>;
		};
		partition@3 {
			label = "NAND.SPL.backup3";
			reg = <0x00060000 0x00020000>;
		};
		partition@4 {
			label = "NAND.u-boot-spl-os";
			reg = <0x00080000 0x00040000>;
		};
		partition@5 {
			label = "NAND.u-boot";
			reg = <0x000C0000 0x00100000>;
		};
		partition@6 {
			label = "NAND.u-boot-env";
			reg = <0x001C0000 0x00020000>;
		};
		partition@7 {
			label = "NAND.u-boot-env.backup1";
			reg = <0x001E0000 0x00020000>;
		};
		partition@8 {
			label = "NAND.kernel";
			reg = <0x00200000 0x00800000>;
		};
		partition@9 {
			label = "NAND.file-system";
			reg = <0x00A00000 0x0F600000>;
		};
	};



	fpga@2,0{
	     reg = <2 0 0x01000000>; /*CSn2*/
             compatible = "cet,am335x-dma-test";
   	     #address-cells = <1>;
	     #size-cells = <1>;
             bank-width = <2>; /* GPMC_CONFIG1_DEVICESIZE(1) *//*16 bit wide*/
	     interrupt-parent = <&gpmc>;
	     interrupts = <0 0>, <1 0>;
             /*gpmc,burst-write;*/
             /*gpmc,burst-read;*/
             /*gpmc,burst-wrap;*/
             gpmc,sync-read; /* GPMC_CONFIG1_READTYPE_ASYNC */
             gpmc,sync-write; /* GPMC_CONFIG1_WRITETYPE_ASYNC */
             gpmc,clk-activation-ns = <0>; /* GPMC_CONFIG1_CLKACTIVATIONTIME(2) */
             gpmc,burst-length = <16>; /* GPMC_CONFIG1_PAGE_LEN(2) */
             gpmc,mux-add-data = <0>; /* GPMC_CONFIG1_MUXTYPE(2) */

             gpmc,sync-clk-ps = <0>; /* CONFIG2 20000*/

             gpmc,cs-on-ns = <10>;       /*10*/
             gpmc,cs-rd-off-ns = <30>;  /*default 100*/
             gpmc,cs-wr-off-ns = <0>;  /*10*/

             gpmc,adv-on-ns = <0>; /* CONFIG3 */
             gpmc,adv-rd-off-ns = <10>;
             gpmc,adv-wr-off-ns = <0>; /*10*/

             gpmc,we-on-ns = <0>; /*10*//* CONFIG4 */
             gpmc,we-off-ns = <0>;/*10*/
             gpmc,oe-on-ns = <10>;
             gpmc,oe-off-ns = <30>;/*100*/

             gpmc,page-burst-access-ns = <10>; /* CONFIG 5 */
             gpmc,access-ns = <10>; /*80*/
             gpmc,rd-cycle-ns = <20>;/*default 120*/
             gpmc,wr-cycle-ns = <0>;/*60*/
             gpmc,wr-access-ns = <10>; /* CONFIG 6 */
             gpmc,wr-data-mux-bus-ns = <20>;

             gpmc,bus-turnaround-ns = <40>; /* CONFIG6:3:0 = 4 */
             gpmc,cycle2cycle-samecsen; /* CONFIG6:7 = 1 */
             gpmc,cycle2cycle-delay-ns = <20>; /* CONFIG6:11:8 = 4 */

/* not using dma engine yet, but we can get the channel number here */
          /*   dmas = <&edma 1>;*/
          /*   dma-names = "rxtx";*/
	      };
};

Regards,

Murugan S

  • Hello Murugan,

    I am operating under the assumption that 8053.dts is not included by any other dts files - let me know if that is incorrect.

    Try replacing

    &pruss_soc_bus {
    	status = "okay";
    
    	
    };
    
    &pruss{
    	pinctrl-names = "default";
    	pinctrl-0 = <&pruss_pins>;
    	status = "okay";
    };
    
    
    &pru0{
    	status = "okay";
    };
    
    &pru1{
    	status = "okay";
    };

    with

    &pruss_soc_bus {
            status = "okay";
    
            pruss: pruss@0 {
                    status = "okay";
            };
    };

    If that allows you to see remoteproc1 and remoteproc2, then add in your pinctrl information and retry.

    Regards,

    Nick