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AM3352: PRU MII boot conflict

Gunter Schmer
Genius 13667 points
Part Number: AM3352
Other Parts Discussed in Thread: TIDA-00299

Hi,

a customer is connecting 2x DP83822 PHYs on the 2x PRU MII interfaces and wants to configure two things on bootup

[] Put the AM3352 into 25MHz crystal mode via SYSBOOT[15:14] = 10b, here the SYSBOOT[15]=1 and is also pr1_mii0_rxdv, a pin connected to the DP83822 RXDV.

[] Put the DP83822 into MII mode with 25MHz reference clock. This would require RXDV to be low, however.

So there is a miss-match, which is also present in the TIDA-00299.

That reference design pulls RXDV high, therefore starting the DP83822 in RMII mode, instead of MII mode, which is required by the PRU.

Is it ok to start the DP83822 in RMII mode and then write to the RMII register RCSR and put it into MII mode and 25MHz mode after the AM3352 bootup?

Regards,

--Gunter

  • 0
    TI__Guru**** 393215 points

    Hi,

    You have probably noticed that the PHY reset signal is connected to a processor GPIO. As PHY bootstrap values are latched at reset release time, this means that you can boot the processor in 25MHz crystal mode via SYSBOOT[15:14] = 10b, then configure LCD_DATA15 as GPIO output, drive it low, release the PHY reset and finally configure LCD_DATA15 as PR1_MII0_RXDV.