Hi,
Currently, my customer implemented the memory on top side in POP package. But the memory will be EOL. So they are considering changing the POP implementation and using the bottom memory interface. In this case, even if there is no pull-stack memory on the top side, is mounting (soldering) on the PT board, operation, static electricity resistance, etc. guaranteed as with normal IC components? After all, if the POP memory is not to be pre-stacked, is it necessary to change to a normal CUS package with no exposed connection terminals on the top side?
Best Regards,
M.Ohhashi
