I am working on change to installed base code which includes source code written in assembly.
The compiler is issuing remark R5682 regarding errata CPU_118.
I have a few questions:
1) My first question is does this errata apply to my part TMS320VC5502?
It is described in addendum document SPRU652G, Revised February 2005, and is included in the technical documentation for the processor at https://www.ti.com/product/TMS320VC5502/technicaldocuments as of 4/9/2020
Another document provided is errata document SPRZ020L, Revised June 2007, The document references the above addendum only by document number "SPRU652", without a revision letter.
2) If errata is fixed, which Silicon revision, and how can I identify the revision that we are using?
If errata is not fixed:
3) Does presence of the remark indicate that the conditions to cause the issue are met (if an interrupt occurs)? If not, I understood the first three conditions described in the errata for the problem to occur, but I don't understand the fourth, "After returning from an interrupt, a specific P-request is stalled with more than two latency cycles". How can I determine if my code will cause this condition?
3) Can you explain the statement that says that if errata occurs, "the CPU will stop execution". Does this mean the CPU stops entirely, or that the block-repeat loop is exited? (inner or outer)?
Thanks for help.