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TMS320C6455: PCI base address register configuration on TMS320C6455

Part Number: TMS320C6455

Hi 

Recently, i designed a PCB to communicate between PC and TMS320C6455. Dose the DSP of PCI registers need to be configured before the accessing from pc? My driver application made a notification that the BAR0 not configured.Then i verified the base address register  default value (= 0x00000008) from datasheet <SPRUE60B>. Now, i am confused about the way of setting the value of BAR0~5 and these registers cannot be configured by dsp.

brance

  • Hello!

    My experience is mainly with PCIe, not PCI, but I am sure both share same ideology: endpoints are seen as memory ranges to root complex or whatever is the name of PCI master. Upon startup it is normally expected, that master will configure at least BARs. Sometimes in TI examples this could be done by devices themselves, when memory map is known and unlikely to change. This is not a case with PC. So I think in your situation you have to configure BARs from PC.

    One note, BAR content you've shown is likely misinterpreted. When you have 1KB device, i.e. address requires 10 bits, then your BAR can be any address, but multiple of  1KB, say 0x0000_0000, 0x0000_0400, 0x0000_C000. What you show - 0x00000008 is just 8 bytes memory space, which seems unpractical. There might be some mess with endianess conversion, then 0x80000000 is 2GB, not sure if that is right.

  • Hi,

    I share the same comments as rrlagic. On the C6455 side, you need to program each BAR with a mask, this is done by your DSP, not PC. In your PC side, you shall have a PCI driver for the C6455 device. Then during the enumeration process, the PC reads the BAR masks and allocate a memory block for each BAR. Then PC writes the memory address to the DSP's BAR registers (overlaid with BAR mask).

    Regards, Eric