This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMDSEVM6678: What does 'encryption enabled' mean with the TMDSEVM6678LXE EVM and also difference between TMDSEVM6678L,TMDSEVM6678LE and TMDSEVM6678LXE EVMs?

Part Number: TMDSEVM6678
Other Parts Discussed in Thread: TMS320C6678

Hello everyone,

I am intending to work with the TMS320C6678 DSP and hence am looking for the right EVMs to purchase. In my attempt to compare their features, I gather the following

TMDSEVM6678L : Has on-board XDS110 emulator which is inferior in performance in comparision to XDS560v2 emulator but a better choice in terms of performance

TMDSEVM6678LE : XDS560v2 emulator(needs to be purchased separately) can be used to emulate this EVM. No on-board emulator. Also paid CCS license is needed, to be able to use XDS560v2.

TMDSEVM6678LXE:  XDS560v2 emulator(needs to be purchased separately) can be used to emulate this EVM. No on-board emulator. Also paid CCS license is needed, to be able to use XDS560v2.

 


Can someone suggest if my understanding about the differences in the EVMs in question is right?

 


I did not get the 'encryption enabled' part for the TMDSEVM6678LXE EVM. Also the original post did not help. It spoke about Security Accelerator whose job I did not understand from the document.

Can someone please suggest what is being implied here? Also what is being encrypted exactly,  if someone can be explicit about it, that would be greatly helpful!

Also the following reply on the post https://e2e.ti.com/support/processors/f/791/t/704912?tisearch=e2e-sitesearch&keymatch=XDS560V2%20vs%20XDS110, caught my eye.

What does "loading big applications on multiple CPUs" mean? Is it possible to gain control on program load such that specific portion of code can be assigned to a specific core?

Can someone also suggest what this implication means?

Thanks in advance,

-Chandrasekhar DVS

  • Hi,

    First of all, CCS is totally free now, regardless which EVM you purchase. Also, all 3 EVMs should have on board xds100 USB emulator. LE and LXE comes with an additional xds560v2 emulator for faster access. "X"  stands for encryption, the chip has SA "security accelerator" enabled.

    SA is a hardware accelerator built inside the SOC to offload the CPU:

    The Security Accelerator (SA) is one of the main components of the Network
    Coprocessor (NETCP) peripheral. The SA works together with the Packet Accelerator
    (PA) and the Gigabit Ethernet (GbE) switch subsystem to form a network processing
    solution. The purpose of the SA is to assist the host by performing security related tasks.
    The SA provides hardware engines to perform encryption, decryption, and
    authentication operations on packets for commonly supported protocols, including
    IPsec ESP and AH, SRTP, and Air Cipher. The SA also provides the hardware modules
    to assist the host in generating public keys and random numbers.

    >>>>>>>What does "loading big applications on multiple CPUs" mean? Is it possible to gain control on program load such that specific portion of code can be assigned to a specific core?

    Can someone also suggest what this implication means?>>>>>>>This, this is totally controlled by your link command file for code/data placement.

    Regards, Eric

     

  • Hi Eric,

    Thanks for the elaboration! I would again like to know,

    lding said:
    LE and LXE comes with an additional xds560v2 emulator

    when you said this, you mean the XDS560v2 is on-board right or you meant only the support and the emulator needs to be purchased separately?

    lding said:
    this is totally controlled by your link command file for code/data placement.

    How would deciding the code placement influence which part of C code is assigned to which core? Can you help me there?

    Thanks in advance,

    -Chandrasekhar DVS

  • Hi,

     XDS560v2 is a mezzanine card attached to the EVM board. When attached, it disabled the on board xds100 emulator. When detached, the board becomes a TMDSEVM6678L, you can use the xds100.

    In the linker, you can define sections like:

    MEMORY
    {
    core0_LL2 (RWX) : org = 0x10800000, len = 0x80000

    core1_LL2 (RWX) : org = 0x11800000, len = 0x80000

    ....


    MSMC (RWX): org = 0x820000, len = 0x20000
    DDR (RWX) : org = 0x80000000, len = 0x10000000
    }

    Then:

    SECTIONS
    {
    .text > core1_LL2
    .const > core1_LL2
    ...

    }

    Regards, Eric

  • Hi Eric,

    It might seem silly but let me ask this,

    let's say I have f1() and f2() in my application's .c file. Is there a way to do something so that f1() is processed by core 1 and f2() is processed by core 2?

    -Chandrasekhar DVS

  • Hi,

    It's unclear to me:

    1. you want to put f1() into core 1's local memory, f2() into core 2's local memory
    2. or, you want core 1 runs f1(), core 2 runs f2(). 

    If it is 1, please see https://www.tij.co.jp/jp/lit/ug/sprui04b/sprui04b.pdf 7.9.4 The CODE_SECTION Pragma

    If it is 2, core1 and core 2 can run two different .out file for this purpose. If you want to use a unified source C code, you can do like:

    .... 

    if (DNUM == 1) {

    f1();

    }

    if (DNUM == 2) {

    f2();

    }

    Regards, Eric

  • Hi Eric,

    Thank you! It was 2) that I was asking for by the way.

    -Chandrasekhar DVS