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TMS320DM8167: DM816x DDR Byte Order

Part Number: TMS320DM8167

Hello,

I know this information has to be somewhere in the user manual but i can't quite find it.  I am testing RAM using a GEL File script via CCS.  I am doing a WR_MEM_32 and then reading it back with RD_MEM_32.  On one of my boards my second-most least significant Byte is bad (i.e.  i write 0x00000000 and i read back 0x0000ZZ00 where ZZ is some non-zero value).  I have 4 DDR chips connected to the BUS 1 for each byte, I am trying to figure out which chip that is associated to so i can investigate more but am not sure what order the Data Macros are sending out the bytes.  Is the messed up byte in my scenario DDR D23:16  OR D15:8?

Thanks,

Jarrod

  • Jarrod Cook said:
    On one of my boards my second-most least significant Byte is bad (i.e.  i write 0x00000000 and i read back 0x0000ZZ00 where ZZ is some non-zero value).

    The impacted bits in the 32-bit word you showed are bits 15:8.  That corresponds to the pins DDR_D15 - DDR_D8.  If you're planning to look at your DDR layout, then you should look at those pins.  Those pins relate to Data Macro 2 if you were going to make an adjustment to leveling or something along those lines.  The mapping of macros to pins is shown in the TRM in Figure 7-2. DDR2/3 Subsytem Block Diagram.

  • Brad,

    Awesome!  Thanks so much, i was having trouble seeing what Byte each data macros was tied to and wanted to be check to be sure!  I greatly appreciate the quick response!

    Thanks,

    Jarrod