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TMS320C6746: /UHPI_HRDY period during Data Read in Autoincrement HPID read access

Part Number: TMS320C6746

Hi,

My customer is using C6746 and has a question about UHPI behavior.
According to TRM(SPRUH80C), section 20.2.6.9.1 and Figure 20-9,
/UHPI_HRDY goes high for only the first halfword HPID read access (Case 2).


My customer wants to know if the period during /UHPI_HRDY=1 is the same for all Case 2.
Or there are some cases, the wait assertion period gets longer by any reasons?

Thanks and regards,
Koichiro Tashiro

  • One other note about this query.
    In customer’s scenario, HPID read accesses are done for the same memory address range.

    Thanks and regards,
    Koichiro Tashiro

  • Hello Tashiro-san

    The HRDY wait time for reads will not be the same in all cases. 

     

    Here are two examples:

    1 - if there is a write followed by read the HPI may still be busy with the write access when the read starts.  Thus the timing between accesses is one variable that can result in a different HRDY time.

     

    2 - There may be other initiators (like the DSP or DMA) accessing the internal RAM and thus the HPI HRDY wait time may be longer depending on that internal arbitration.

    Hope that helps some.

    Regards

    Mukul 

  • Hi Mukul,

    In customer’s scenario;

    a) C5504(EMIF) is accessing to C6746(UHPI).

    b) No other initiator accesses to the memory region during UHPI access.

    c) No write followed by read operation is done. Read is done separately from write.

    Under these conditions, the HRDY wait time is the same for all reads?

    Thanks and regards,
    Koichiro Tashiro

  • Hi Tashiro-san

    On b) can you elaborate what is actually happening on c6746 , while HPI transactions are ongoing from c55x?

    >>Under these conditions, the HRDY wait time is the same for all reads?

    I would believe that to be the case,  is the customer seeing a different behavior?


    Regards

    Mukul 

  • Hi Mukul,

    While C55x is accessing HPI, C6746 does not do anything.
    C6746 is just waiting in loop for an interrupt from C55x telling HPI access is finished.

    Customer checked the silicon behavior and the HRDY period was the same.
    They just want to make sure.

    Thanks and regards,
    Koichiro Tashiro

  • Thanks for clarifying that Tashiro-san

    Based on the description you have provided, we think that the behavior should remain the same as long as the "use-case" remains same/constant.

    Regards

    Mukul