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TMS320DM8148: TV OUT

Part Number: TMS320DM8148
Other Parts Discussed in Thread: OPA361,

Hi, I have read and implemented OPA361 and TV Detection SBOA109 but on TMS320DM8148.

In the TRM SPRUGZ8G, Table 3-143, it shows pins for TV Detect. GPIO1_0 and GPIO1_1. (below)

When I look at PIN MUX 2.5.2 utility, it shows these as pins AG6 and AH6 which I currently have assigned as I2C(3).

My Question: Are AG6 and AH6 the only pins that will work for TV Detect or can a different GPIO be used?

Thanks, Patrick

  • Because you are OPA361 - which is external to DM8148, any internal TV detect logic cannot be used (as the TV detect circuit is on output of OPA361).  Therefore the TV_DET signal can be routed to a standard GPIO of teh DM8148.  Any 'internal' TV detect logic will not be used. The registers identified in this thread can be set to use GPIO pads, and the IO can be used as standard GPIO.

    Can these pings AG6, AH6 be used for I2C?  Yes - they can be used for I2C functions.  As mentioned earlier - the TV DET signal can be connected to any other GPIO.

  • So GPIO1_0 and GPIO1_1 on AG6 and AH6 are not required.

    vdac_tvint; Is this the name of the register you are referring to for the OPA361A that can be assigned to any GPIO pin? Else, what is the register name I need to use?

    Right now I have the TV Detect pin connected to GP2[28] pin AE24. Our previous firmware engineer

    was not able to make TV DETECT work and I am just checking the hardware as we have an upcoming board spin (if I need to 

    change GPIO). Thanks in advance for the clarification - Patrick 

  • On the existing design (TV Detect not working, connected to GP2[28]) - did you investigate incoming signal to see what levels it was producing?  In the SBOA109 app note, the output of the buffer is pulled to 1.8V.  Is GP2[28] a 3.3V IO?  If yes - that is likely your issue - as the 1.8V detect signal will not reach a valid logic level for 3.3V IO.

  • All my GPIO[1,2,3]{K20 L21 M20] are 1V8. GP2[28] is IPD. Maybe when code developer was working on this the internal pull down was not disabled and the pin register should be DIS for GP2[28] Pin AE24 due to 100K series. Per the TV Detect app note, my schematic has below so levels should be OK. Maybe he did not toggle enable on OPA361A for detection? Since external OPA361A we just use our own logic to have GP2[28]TV_DETECT control GP0[17] VID_EN?

    Now to find this in our code. - Patrick

  • Yes - I think the first step is to verify the logic levels to the external OPA device (enable, detect).  Agree - the internal PD on detect signal needs to be enabled. Measuring the voltage level at high (no monitor connected) would indicated if internal PD was causing any issue (if its enabled).

  • Question from above: "the internal IPD on detect signal needs to be enabled". That is AE24 for us.

    What register controls this specific IPD? - Patrick

     

  • The GPIO that is used for detect (pin AE24) - I believe the IPD needs to be DISABLED.  The detect circuit you showed has a external PU - and when the monitor/display is attached - the signal is pulled low.  As stated in the data manual, the PINCNTL register for this pin is PINCNTL204.