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TDA3MA: Device performance

Part Number: TDA3MA

Hi Sir,

A customer is interesting on TI product of TDA3MA.

He have some technical inquiries, could you please help me to clarify these queries?

1. What are the communication rate and working mode of csi2, SPI and QSPI, and the data range of communication transmission?

    where can I find these information in TI technical documents?

2. Does this DPS support MPU, what are the maximum number of regions and the size of each region?

3. What are level state of pin after power off, the level state when power on and power off, and the level state when reset?

4. Definition of clock pin high level, definition of clock pin low level,

The relationship and value of the whole clock tree of this DSP?

Thanks.