I got questions from my customer for DDR3 configuration in K2H.
Customer used TI GEL file (xtcievmk2x_arm.gel) as reference, but there are some unclear points.
Please see attached excel for details.
Q1) There are same parameters both in SDTIMx registers and DTPR register. What are differences ?
Q2) DDR3 user's guide (spruhn7c.pdf) mentions to keep CKE low for 500us at power-up initialization.
Is this needed?
Q3) What is FRQSEL value in PLLCR register?
Q4) What is CPPC in PLLCR register?
Thanks and regards,