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AM4377: EMIF 'EMIF4D_EXT_PHY_CTRL_1' Register Bit Field Functionality

Martin Ford1
Prodigy 70 points
Part Number: AM4377

Hi,

We are using the AM4377 Sitara Processor with DDR3 SDRAM and have had trouble getting the EMIF consistently working, some boards work and some do not.  We have used the SPRAC70A_AM437x_EMIF_Configuration_Tool_V21 to determine the required register values based upon the DDR3 memory we are using and the board routing, the result indicating we needed to activate the 'Invert Clock' function.

Using the above we noticed that register EMIF4D_EXT_PHY_CTRL_1 required a different value when the 'Invert Clock' function is active, with the PHY_REG_CTRL_SLAVE_RATIO_x bit fields changing.  The user manual doesn't describe what these bit fields actually do.

My question is does anyone know what these bit fields are used for and how the 'Invert Clock' influences the field setting.  Changing this register value along with the 'Invert Clock' now allows our system to work correctly on all boards therefore this bit field must influence something on the EMIF interface.

Any information would be greatly appreciated.

Cheers

Martin

  • 0
    TI__Guru 68950 points

    Martin,
    the slave ratio is associated with the launch timing of the address/command signals, and invert clock simply inverts the polarity of the DRAM clock.

    In order to properly align addr/cmd to DDR clock, the slave ratio will adjust to accommodate for the half cycle change in the clock from the inverted polarity.

    The spreadsheet should produce the appropriate values to allow the DDR training to successfully complete. Hand tweaking of the registers should not be necessary. From the description of your "fix", it doesn't seem like the training is being performed. or possibly there is an issue with the trace routing on the board

    Can you post the spreadsheet with your final values? Also, with JTAG and CCS, can you run the following DSS script and post the results:

    https://git.ti.com/cgit/sitara-dss-files/am43xx-dss-files/tree/am43xx-ddr-analysis.dss

    Instructions for running it are here: https://git.ti.com/cgit/sitara-dss-files/am43xx-dss-files/tree/README

    The scripts will dump and decode a bunch of registers to help ensure you have the right DDR configuration.  That should give us more info into what the problem may be.

    Also can you note which OS are you using (linux, RTOS, etc) and version, so i know where you started from.

    Regards,

    James

  • 0 in reply to JJD
    Prodigy 70 points

    James,

    We have actually got the DDR working using the register values shown on the last sheet of the spreadsheet.  My enquiry was more about understanding what the field bits in the EMIF4D_EXT_PHY_CTRL_1 register are actually doing as there is no information or timing diagrams given in the AM4377 user manual.

    Thank you for providing the information, it's a little clearer now.

    Regards

    Martin