Hi,
I am developing an Ethernet driver for PRU-ICSSG (SR 2.0) using dual mac firmware for AM6548 chip based on a proprietary RTOS.
I am using the SDK 7.01 based DUAL EMAC firmware from the below source:
I have a query regarding a setting in packages\ti\drv\emac\firmware\icss_dualmac\config\emac_fw_config_dual_mac.c file. Below is the code snippet:
//For reducing IEP latency. Enable OCP clock.
HW_WR_REG32(icssgBaseAddr + CSL_ICSSCFG_REGS_BASE + CSL_ICSSCFG_IEPCLK, 1U);
//Delay after IEP Sync Config. Requires minimum 10 ICSS clock cycles before IEP register access
Osal_delay(100);
AND
/* Enable IEP0 counter and set default increment as 4 */
regVal = (0x1U << CSL_ICSS_G_PR1_IEP0_SLV_GLOBAL_CFG_REG_CNT_ENABLE_SHIFT) |
(0x4U << CSL_ICSS_G_PR1_IEP0_SLV_GLOBAL_CFG_REG_DEFAULT_INC_SHIFT) |
(0x4U << CSL_ICSS_G_PR1_IEP0_SLV_GLOBAL_CFG_REG_CMP_INC_SHIFT);
HW_WR_REG32(icssgBaseAddr + CSL_ICSS_G_PR1_IEP0_SLV_REGS_BASE + CSL_ICSS_G_PR1_IEP0_SLV_GLOBAL_CFG_REG, regVal);
/*Enable IEP1 counter and set default increment as 4 - Required for RX and TX time stamping*/
regVal = (0x1U << CSL_ICSS_G_PR1_IEP1_SLV_GLOBAL_CFG_REG_CNT_ENABLE_SHIFT) |
(0x4U << CSL_ICSS_G_PR1_IEP1_SLV_GLOBAL_CFG_REG_DEFAULT_INC_SHIFT) |
(0x4U << CSL_ICSS_G_PR1_IEP1_SLV_GLOBAL_CFG_REG_CMP_INC_SHIFT);
HW_WR_REG32(icssgBaseAddr + CSL_ICSS_G_PR1_IEP1_SLV_REGS_BASE + CSL_ICSS_G_PR1_IEP1_SLV_GLOBAL_CFG_REG, regVal);
What is the purpose of these settings?
According to my understanding these configurations are for TX and RX time stamping. If I don't want to use time stamping are these configurations required?
I observe an issue that if the IEP configurations are not done there is a problem with 10 Mbps link speed if these settings are not done. After link is established at 10 Mbps, there is a link down->link up, the firmware stops receiving packets. If the IEP register settings are done, then there is no such issue.
I am not sure how these 2 are related. Could you please kindly provide some information about the above settings and the impact if these are not done.
Best Regards,
Debarun