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PRU-ICSS-INDUSTRIAL-SW: Purpose of IEP counter

Part Number: PRU-ICSS-INDUSTRIAL-SW

Hi,

  I am developing an Ethernet driver for PRU-ICSSG (SR 2.0) using dual mac firmware for AM6548 chip based on a proprietary RTOS.

  I am using the SDK 7.01 based DUAL EMAC firmware from the below source:

  I have a query regarding a setting in packages\ti\drv\emac\firmware\icss_dualmac\config\emac_fw_config_dual_mac.c file. Below is the code snippet:

//For reducing IEP latency. Enable OCP clock.
HW_WR_REG32(icssgBaseAddr + CSL_ICSSCFG_REGS_BASE + CSL_ICSSCFG_IEPCLK, 1U);

//Delay after IEP Sync Config. Requires minimum 10 ICSS clock cycles before IEP register access
Osal_delay(100);

AND

/* Enable IEP0 counter and set default increment as 4 */
regVal = (0x1U << CSL_ICSS_G_PR1_IEP0_SLV_GLOBAL_CFG_REG_CNT_ENABLE_SHIFT) |
(0x4U << CSL_ICSS_G_PR1_IEP0_SLV_GLOBAL_CFG_REG_DEFAULT_INC_SHIFT) |
(0x4U << CSL_ICSS_G_PR1_IEP0_SLV_GLOBAL_CFG_REG_CMP_INC_SHIFT);
HW_WR_REG32(icssgBaseAddr + CSL_ICSS_G_PR1_IEP0_SLV_REGS_BASE + CSL_ICSS_G_PR1_IEP0_SLV_GLOBAL_CFG_REG, regVal);

/*Enable IEP1 counter and set default increment as 4 - Required for RX and TX time stamping*/
regVal = (0x1U << CSL_ICSS_G_PR1_IEP1_SLV_GLOBAL_CFG_REG_CNT_ENABLE_SHIFT) |
(0x4U << CSL_ICSS_G_PR1_IEP1_SLV_GLOBAL_CFG_REG_DEFAULT_INC_SHIFT) |
(0x4U << CSL_ICSS_G_PR1_IEP1_SLV_GLOBAL_CFG_REG_CMP_INC_SHIFT);
HW_WR_REG32(icssgBaseAddr + CSL_ICSS_G_PR1_IEP1_SLV_REGS_BASE + CSL_ICSS_G_PR1_IEP1_SLV_GLOBAL_CFG_REG, regVal);

 What is the purpose of these settings?

  According to my understanding these configurations are for TX and RX time stamping. If I don't want to use time stamping are these configurations required?

  I observe an issue that if the IEP configurations are not done there is a problem with 10 Mbps link speed if these settings are not done. After link is established at 10 Mbps, there is a link down->link up, the firmware stops receiving packets. If the IEP register settings are done, then there is no such issue.

  I am not sure how these 2 are related. Could you please kindly provide some information about the above settings and the impact if these are not done.

Best Regards,

Debarun

  • Hi,

      There is another issue that I have observed corresponding to the IEP settings. If the settings mentioned in the previous post are not done, the RX packets get corrupted at times (not all packets). The issue is reproducible only when link speed is established at 1Gbps (not reproducible if link speed is established at 100 Mbps).

    Packet sent from Host PC

    0x0 0x44 0x55 0x11 0x22 0x33 0x0 0x2b 0x67 0x30 0x8c 0x72 0x8 0x0 0x45 0x0 0x1 0x8 0x35 0xea 0x0 0x0 0x80 0x1 0x72 0xae 0xc0 0xa8 0x8 0x2 0xc0 0xa8 0x8 0xa 0x8 0x0 0xee 0xb4 0x0 0x1 0x2a 0x68 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66

    Packet received by Ethernet driver
    0x0 0x44 0x55 0x11 0x22 0x33 0x0 0x2b 0x67 0x30 0x8c 0x72 0x8 0x0 0x45 0x0 0x1 0x8 0x35 0xea 0x0 0x0 0x80 0x1 0x72 0xae 0xc0 0xa8 0x8 0x2 0xc0 0xa8 0x69 0xa 0x8 0x0 0xee 0xb4 0x0 0x1 0x2a 0x68 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x61 0x62 0x63 0x64 0x65 0x66

    If the IEP settings mentioned in the previous post is done then this issue is not reproducible.

    To summarize

    1. If "For reducing IEP latency. Enable OCP clock"  settings is not done, the packet corruption issue occurs.

    2. If "Enable IEPx counter and set default increment as 4 - Required for RX and TX time stamping" settings is not done, then the 10 Mbps link down->link up issue occurs.

    Again I am not sure how the settings are related to these issues. Are these IEP related settings mandatory even if the time stamping is not required?

    Best Regards,

    Debarun

  • Hi Debarun,

    Few clarifications

    1. 10Mbps is not officially supported in SDK 7.1, there are some known issues related to it. Can you reach out via your TI representative for an updated release package and timelines.

    2. Yes, IEP is used inside the dual EMAC for general purposes so it should be enabled for regular use case.

    Regards

    Vineet

  • Hi Vineet, 

      Thank you for the reply. I understand the situation, I will retain the configuration for my Ethernet driver as well.

      There is another configuration

    /* Enable PA_STAT block for diagnostic counters in ICSSG */
    regVal = (uint32_t)(1U << 31U) | 2U; //Enable stats block, 2 vi
    HW_WR_REG32(icssgBaseAddr + CSL_ICSS_G_PA_STAT_WRAP_PA_SLV_REGS_BASE + 8U,regVal);

      This seems to be for diagnostics. Is this configuration also mandatory for regular use case (that is, is it used inside dual EMAC for general purposes) ?

    Best Regards,

    Debarun

  • Hi Debarun,

    PA_STAT is also used inside the firmware, if you want statistics then better to retain it.

    Regards

    Vineet