Other Parts Discussed in Thread: DRA821
I am using J7200XSOMXEVM to evaluate the uart of dra821. I tried to modify the uart baud rate to 12M based on the SDK demo “csl_uart_test_app”. According to the Technical Reference Manual of DRA821, I need to modify CTRLMMR_USART0_CLK_CTRL, set CLK_DIV to 0h-Divide by 1, and the input clock has been set to 192MHz, so I can set the baud rate to 12M. In the Technical Reference Manual, CTRL_MMR0 has 2 offsets: Proxy0 Offset and Proxy1 Offset, as well as 2 physical addresses. I tried to use the CTRL_MM R0_CFG0 Proxy0 Physical Address in the document to modify it, but it didn't seem to work. I have set up the MMR unlock before this. So what should I do to modify CTRLMMR_USART0_CLK_CTRL? What should be the correct step?