I have a problem where HRDY_n goes high and stays high until I cycle the power or do a reset. It happens while the host is doing a combination of HPI bus writes and reads. The host is doing multiple control, address and data register writes, then starts the following set of cycles that lead up to the error:
Write control register with 0x1
read control register gets back 0x10D
write address register with 0x1C000020
read address register to verify 0x1C000020
read data register using auto inc mode at which time the HPI goes not ready and stays not ready
Just before the last read, the host reads the same value it wrote into the address register so I know the address is getting in right. Also, I tried changing the timing relationship between the DS_n strobe and the control lines just in case there was a timing issue but it didn't have an effect on the problem.
I'm not sure if the control register is getting written properly. I'm using an FPGA signal tap at the host end of the bus so I don't how the signals look at the DSP, but it looks like it writes a 0x1 and reads 0x10D. Maybe this is a problem.
Would you have any suggestions?
Thank you.