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I am using PSDK of v03.02.05 and want to lower the power consumption of cpu.
The power consumption report of PSDK, OP level only three: NOM, OD, HIGH, corresponding to 1GHz, 1.176GHz, 1.5GHz of cpu frequency.
I want to know that am5728 can be set to lower than 1GHZ?
And the kernel of PSDK says it supports online hotplug cpu, throughing /sys/devices/system/cpu.
I offline cpu 1 of am5728, but power consumption is the same.
Is it possible to make am5728 only running 1 cpu?
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In reply to Biser Gatchev-XID:
jinhu wuI want to know that am5728 can be set to lower than 1GHZ?
Yes, it can. 1GHz is the MAX frequency supported in OPP_NOM. You can use in example 500MHz.
See the below pointers for more info:
jinhu wuIs it possible to make am5728 only running 1 cpu?
Yes, it is possible to run only 1 cpu - "single core" mode. We have Dhrystone benchmark test that can be run on signle core or dual core:
The simplest way to add the 500MHz operating point is by pasting this code at the end of your board's device tree (DTS) file.
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <1060000 850000 1150000>;
opp-supported-hw = <0xFF 0x01>;
This will allow your CPU to go down to 500MHz as needed and can be controlled within Linux by the cpufreq driver. For more detailed info see the Linux section of this wiki:
In reply to Ahmad_Rashed:
In reply to jinhu wu:
jinhu wu3.to clear the SMP bit of Auxiliary Control Register (ACTLR) of CPU 1 but question is the step 3: I do not know how to clear SMP bit only for CPU 1. from "infocenter.arm.com/help/index.jsp", I found the mcr, mrc instructions to the clear SMP bit, but I do not know how to sel cpu 1?
Regarding control of SMP bit of ACTLR register, refer to the below pointers:
In reply to Pavel Botev:
Thanks to reply. I try following step to deactived cpu 1, but it seems failed. 1.U-boot, to close power of cpu 1 and clear ACTLR.smp bit file file: u-boot/arch/arm/cpu/armv7/omap5/hwinit.c function: do_io_settings, and add below code at beginning of function unsigned pwr_cpu1_addr = 0x48243800; //PM_CPU1_PWRSTCTRL unsigned pwr_cpu1_state = readl(pwr_cpu1_addr); pwr_cpu1_state = pwr_cpu1_state & (~(0x3)); //PM_CPU1_PWRSTCTRL[1:0] POWERSTATE bit field to 0x0 (OFF state) pwr_cpu1_state = pwr_cpu1_state | ((0x1) << 7); //PM_CPU1_PWRSTCTRL FORCED_OFF bit to 0x1 writel(pwr_cpu1_state, pwr_cpu1_addr); //clear ACTLR.smp bit uint32_t temp, val; /* Read auxiliary control register */ asm volatile ("mrc p15, 0, %0, c1, c0, 1\n\t" : "=r"(val)); /* Disable SMP */ val &= ~(1 << 6); /* Write auxiliary control register */ asm volatile ("mcr p15, 0, %0, c1, c0, 1\n\t" : : "r"(val)); CP15DSB; CP15ISB; 2. Kernel (1) Disable Kernel Features->Symmetric Multi-Processing, it means only support one cpu, right? (2) File: kernel/arch/arm/mach-omap2/clockdomains7xx_data.c, kernel/arch/arm/mach-omap2/powerdomains7xx_data.c remove cpu1_7xx_clkdm and cpu1_7xx_pwrdm. (3) at nfs console, read PM_CPU1_PWRSTCTRL, the value is 0x30184, which means the power of cpu1 is totally close, right? but the real is: The power supply voltage of my board is 15V and measure current from power supply. for dual core: if cpu is 1.5GHz(OP_HIGH), the current is about 2.22A if cpu is 1.176GHz(OP_OD), the current is about 2.18A if cpu is 1GHz(OP_NOM), the current is about 2.18A if cpu is 500MHz(OP_NOM), the current is about 2.13A for single core: only test for 500MHz the current is about 2.13A, the same as dual core. Question: 1.My processes are right? or something wrong? 2.How to ensure that cpu 1 is closed? PM_CPU1_PWRSTCTRL = 0x30184 means cpu1 is totally close, right? 3.Dhrystone Single Core of AM57x Thermal Considerations, it use am571x or am572x? if using am572x, which settings to close cpu1 to lower power consumption when testing.
Frankly, most of the power consumption is in the CORE domain. It includes the memory controller, SoC interconnect, and SoC peripherals. So there is a lake of transistors consuming more power than the few transistors in the MPU. Your time will be better spent checking for unused peripherals within the SoC.
Use the omapconf tool to debug the power states of the internal power and clock domains of the SoC. Here is the omapconf wiki.
Start with this command: omapconf show pwst
Let me know how it goes!
PS: I do not believe we disable the 2nd core in the single core dhrystone. There is no mechanism to disable power and clock to the 2nd core independently from the first core either. So you will not see any reduction in power consumption between OS idle and core disabled states.
jinhu wu2.How to ensure that cpu 1 is closed? PM_CPU1_PWRSTCTRL = 0x30184 means cpu1 is totally close, right?
Check also register PM_CPU1_PWRSTST, bit-field [1:0] POWERSTATEST should be 0x0
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