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Linux/TMDXIDK5718: How SPL can read EEPROM behind Mux on I2C bus 2

Intellectual 660 points

Replies: 12

Views: 565

Part Number: TMDXIDK5718

Tool/software: Linux

Hi

I'm using Linux SDK 5.1, custom HW, strongly based on IDK574.

I have EEPROM (chip address 0x51) on I2C bus 2 behind an pca9546 (chip address 0x70) on channel 1 (In IDK, EPROM and PMIC are both on I2C bus 0.)

I can successfully read eeprom in U-boot as follows:

Setting bus 2: i2c dev 2

setting channel 1 on mux: i2c mw 70 0.1 1

Read 400h bytes: i2c md 51 0.2 400

Now I tried to do same in do_board_detect() of SPL. 

int save = i2c_get_bus_num(); // save the bus number because later in board_late_init() we have to talk to bus 0 again

gpi2c_init()

rc = i2c_set_bus_num(i2c_bus /* 2 */);

if (rc)    return rc;

// set mux to channel 1
uint8_t buffer = 1; // channel 1
rc = i2c_write(0x70, 0, 0, &buffer, 1); // here I always get return code 1
if (rc) return rc;

rc = i2c_probe(0x51);

if (rc) return rc;

rc = i2c_read(0x51, 0x0, 0x2, (uint8_t *)ep, sizeof (struct my_eeprom));
if (rc) return rc;

i2c_set_bus_num(save); // restore bus number

So How I can I use bus number 0 in SPL? Do I have to add the mux and EEPROM in devicetree?  I just enabled i2c2:

&i2c2 {

clock-frequency = <100000>;

u-boot,dm-spl;

status = "okay";

};

Or do I have to set CONFIG_SYS_OMAP24_I2C_SLAVE<n> or some other CONFIG_?

BR, Chris

  • In reply to Christian Leeb:

    Yes - most likely then I2C3 is not being initialized or the pinmux is incorrect. Let me create patch or example code to enable I2C3.

    P.S. If this response helps answer your question please mark this post as verified - Thanks!

  • In reply to Marcus Cooksey:

    Using i2c1 as an example, edit file

    ./arch/arm/mach-omap2/am33xx/clock_am33xx.c
    function enable_basic_clocks()
    structure clk_modules_explicit_en[].

    Add the configuration and entry for i2c3 similar to "cmper->i2c1clkctrl"

    P.S. If this response helps answer your question please mark this post as verified - Thanks!

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