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Linux/TMDXIDK5718: PCIe EP not recognized on Linux PC

Prodigy 90 points

Replies: 10

Views: 244

Part Number: TMDXIDK5718

Tool/software: Linux

Hello TI Expert,

How was the PCIe EP mode on AM5718-IDK brought up? 

I have followed EP User's Guide with the link http://processors.wiki.ti.com/index.php/Linux_Core_PCIe_EP_User%27s_Guide#Endpoint_Controller_devices_and_Function_drivers, But ,the pc can't Recognition it with the command lspci.

There are message that may help resolve the issue.

[root@Linux pci_ep]# dmesg |grep pci
[ 0.000000] arch/arm/mach-omap2/clockdomain.c _clkdm_lookup dump_stack start name is pcie_clkdm
[ 0.000000] arch/arm/mach-omap2/clockdomain.c _clkdm_lookup dump_stack start name is pcie_clkdm
[ 0.000000] arch/arm/mach-omap2/clockdomain.c _clkdm_lookup dump_stack start name is pcie_clkdm
[ 0.000000] arch/arm/mach-omap2/clockdomain.c _clkdm_lookup dump_stack start name is pcie_clkdm
[ 0.000000] arch/arm/mach-omap2/clockdomain.c _clkdm_lookup dump_stack start name is pcie_clkdm
[ 0.000000] arch/arm/mach-omap2/clockdomain.c _clkdm_lookup dump_stack start name is pcie_clkdm
[ 0.000000] arch/arm/mach-omap2/clockdomain.c _clkdm_lookup dump_stack start name is pcie_clkdm
[ 0.745519] Jason-pci: dra7xx_pcie_probe into
[ 0.745666] dra7-pcie 51000000.pcie_ep: Linked as a consumer to phy-4a094000.pciephy.3
[ 0.745675] Jason-pci: dra7xx_pcie_enable_phy into
[ 0.745837] dra7-pcie 51000000.pcie_ep: GPIO lookup for consumer (null)
[ 0.745844] dra7-pcie 51000000.pcie_ep: using device tree for GPIO lookup
[ 0.745876] of_get_named_gpiod_flags: parsed 'gpios' property of node '/ocp/axi@0/pcie_ep@51000000[0]' - status (0)
[ 0.745907] Jason-pci:DW_PCIE_EP_TYPE into
[ 0.745915] Jason-pci: dra7xx_pcie_ep_legacy_mode into
[ 0.745931] Jason-pci: dra7xx_add_pcie_ep into
[ 0.745955] Jason-pci:dw_pcie_ep_init ep->num_ib_windows is 0x4
[ 0.745964] Jason-pci: dra7xx_pcie_ep_init into
[ 0.745970] Jason-pci: dw_pcie_ep_reset_bar into
[ 0.745976] Jason-pci: dw_pcie_ep_reset_bar into
[ 0.745982] Jason-pci: dw_pcie_ep_reset_bar into
[ 0.745987] Jason-pci: dw_pcie_ep_reset_bar into
[ 0.745993] Jason-pci: dra7xx_pcie_enable_wrapper_interrupts into
[ 0.746126] Jason-pci:dra7xx_pcie_probe done !
[ 84.914262] Jason-pci:dra7xx_pcie_establish_link into
[ 84.919426] Jason-pci: dra7xx_pcie_link_up into

[root@Linux pci_ep]# echo "51000000.pcie_ep" > dev/epc
[ 84.914262] Jason-pci:dra7xx_pcie_establish_link into
[ 84.919426] Jason-pci: dra7xx_pcie_link_up into

Thanks

JasonSun

  • Hi, Jason,

    where did you issue the lspci command, on the RC or EP? "lspci" command only works on RC.

    Rex

     

  • In reply to Rex Chang:

    Besides, the EP needs to come up first before RC as the PCIe EP user's guide indicates. Please search on E2E forum. There are several similar issues that the RC needs to rescan for EP.

     

  • In reply to Rex Chang:

    Hi, Jason,

    There is a duplicate issue in

    https://e2e.ti.com/support/processors/f/791/t/813316

    I'll close this one and post on the other thread.

    Rex

     

  • In reply to Rex Chang:

    Hi,

    I am sorry for reply so late。

    I use the “lspci”command on PC RC side

    Thanks

    JasonSun

  • In reply to Rex Chang:

    YES ,I know that.

    In my EP side,I have exchange the res and cap, R19 R13 ,C17 C18,is it needed?

    thanks

    JasonSun

  • In reply to jason.sun:

    Hi, Jason,

    As I posted in the other thread, the EP should take clock from RC. So, the PCIE_SS shouldn't use current internal clock source, but take the external clock from RC through LJCB_CLKP/N by programming ACSPCIE in RX mode.

    Please refer to section 26.4 PCIe PHY Subsystem of the AM5728 TRM, SPRUHZ6J, and take a look at Figure 26-17.

    Rex

     

  • In reply to Rex Chang:

    Hi Rex,

    This is not about the clock,Maybe it is a issue of the power.I have changed a RC with imx 6 rather than a PC ,then it lists the venderid and device id.I plug the pcie line to imx6 before that is into the kernel.

    Thanks

    JasonSun

  • In reply to Rex Chang:

    Hi Rex,

    I wonder why cut the line to isolate the reference clocks from each EVM,can you tell me?

    Thanks

    JasonSun

  • In reply to jason.sun:

    Hi, Jason,

    I mentioined in my earlier post that if both EVMs having power and clock across the cable, the EVM will be damaged. We removed the power and clock on the cable and let each EVM uses its own clock. Since both EVMs are running at the same frequency, so they are in sync. 

    Rex

     

  • In reply to Rex Chang:

    Hi Rex,

    Thanks you !!!

    JasonSun

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