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the question about RSTOUT on DM8168
Part Number: TMS320DM8168
chapter 7.2.13 of the datasheet says:
This output is always asserted low when any of the following resets occur:• Power-on reset (POR)• External warm reset• Emulation warm reset (RESET)• Software global cold or warm reset• Watchdog timer reset.
I measured the RSTOUTn pin on my board:
The RSTOUTn pin is always remains low when the following reset occur:
• Power-On Reset (PORn)
but I get a 1us low pulse on the RSTOUTn pin, when the following reset occur:
• External Warm Reset (RESETn)
it seems to be different from the contents of the datasheet.anyone could help? thanks!
DM816x datasheet section "8.2.3 External Warm Reset (RESETn pin)" states that:
- An external warm reset is activated by driving the RESETn pin G33 active-low.
- The RESETn pin must be asserted (low) for a minimum of 32 DEV_MXI cycles. Within the low period of the RESETn pin, the following happens: RSTOUTn is asserted
- The RESETn pin may now be de-asserted (driven high). When the RESET pin is de-asserted (high): RSTOUTn is de-asserted
Datasheet seems to be correct. RSTOUTn low signal duration depends on RESETn low signal duration. When you measure RSTOUTn low signal duration, please check also PORn and RESETn low signal duration.
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In reply to Pavel Botev:
Thank you for your reply
I drived RESETn low manually,so the RESETn duration was long enough.I also tried to keep the RESETn always being low,but RSTOUTn was still 1us low pulse.
In reply to user1157370:
Do you test on DM816x TI EVM TMDXEVM8168 or DM816x custom board?
What I can suggest you is:
- check this on TMDXEVM8168 board
- The RESETn pin G33 must be asserted (low) for a minimum of 32 DEV_MXI cycles.
- check if changing the value of below bit fields will impact RSTOUTn duration
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