This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

  • TI Thinks Resolved

66AK2G12: 66AK2G12, evaluation board , DDR3 termination

Prodigy 240 points

Replies: 2

Views: 74

Part Number: 66AK2G12

Hi .

I am using "66AK2G12 "device . As two device evaluation boards are available on TI platform by Mistral solutions.

1-- MS_TI_K2GEVM

2- MS_TI_k2GICE.

There is a difference in DDR3 termination section of board interfacing with SoC. In first board capacitors terminated with "DGND" 

While on other board DDR3 termination section capacitor terminated with "1.35V " net name as (VDDS_DDR_K2G). 

Please someone elaborate what is difference in both techniques  or which one is better.?

Schematic cutout of both are Attached below.

STAY BLESSED!

  • Hi,

    Sorry for the late reply. Let me check that and I will update the thread.

    Best Regards,
    Yordan

     


     Please make sure you read the forum guidelines first.

  • Hi Jens,

    The termination scheme on the K2GICE board matches that termination used in the JEDEC standard for DDR3L Unbuffered DIMMs. That should be the termination scheme used in your design.

    Regards, Bill

    If you need more help, please reply back. If your question is answered, please click  Verify Answer 

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.