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the question about RSTOUT on DM8168

Hi.

I am working on dm8168, with the DVRRDK4.1.

I get  pulses on the RSTOUTn pin, when the following resets occur:

• Power-On Reset (POR)
•System reboot

the pulse of POR has hundreds of milliseconds 

5153.reset.tif

but the pulse of Sytem reboot only hundreds of nanoseconds

7510.reboot.tif

Therefore, when the system restarts, sometimes network chip will not be reset.

How can I solve this problem to ensure that the after system soft reset, the network chipis OK?

  • Hello,

    I have the below on the DM814x EVM (I suspect the same should be valid for DM816x)

    I measured the RSTOUT_WD_OUT signal on DM814x/AM387x EVM.

    And we can NOT control its pulse duration by RSTTIME1 and RSTTIME2 bit fields from the PRM_RSTTIME register, when the reset is generated from software global cold/warm reset.

    These are my measurements:

    1. When reset is generated from Watchdog reset:

    - RSTTIME2 value has no impact

    - when RSTTIME1 value is 0x6 (default), RSTOUT_WD_OUT is 600ns

    - when RSTTIME1 value is 0xF, RSTOUT_WD_OUT is 1000ns

    - when RSTTIME1 value is 0xFF (max), RSTOUT_WD_OUT is 13000ns

    2. When reset is generated from software global warm reset, PRM_RSTCTRL[0] RST_GLOBAL_WARM_SW = 0x1

    - RSTTIME2 value has no impact

    - RSTTIME1 value has no impact

    - RSTOUT_WD_OUT is 750ns

    3. When reset is generated from software global cold reset, PRM_RSTCTRL[1] RST_GLOBAL_COLD_SW = 0x1

    - RSTTIME2 value has no impact

    - RSTTIME1 value has no impact

    - RSTOUT_WD_OUT is 800ns

    See also the below two e2e threads:

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/228610.aspx

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/272368.aspx

    Regards,
    Pavel

  • hi , any process??

    How to increase the asserted time of RSTOUTn pin ????
  • It is clearly stated that RSTOUT pulse duration can be controlled only when initiated by a Watchdog timeout. DM816x device is designed like that and I do not expect changes in the design in future.

    The only option for you that I can think of is to initiate WDT reset through the application saWatchdog, see the below wiki page:

    processors.wiki.ti.com/.../TI81XX_PSP_WDT_Driver_User_Guide