hi,
We want to use 3 slaves with SPI0, but am335x supports only 2 CS signals. We want to configure either the 3rd CS signal as gpio or all three chip select signals as gpios. We are able to communicate with slave CS1 if we mux the spi0_cs1 pin as spi0_cs1(mode0). If we configuring this pin as gpio0_6(mode7) we can not communicate with the chip. There is no 'eeprom' on /sys/bus/spi/devices/spi1.1/ . How should a gpio be configured to act as cs pin?
Corresponding parts on the dts file:
spi0_pins_default: pinmux_spi0_pins {
pinctrl-single,pins = <
0x150 (PIN_INPUT | MUX_MODE0) /* spi0_sclk.spi0_sclk */
0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
0x158 (PIN_INPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
0x15C (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
/*0x160 (PIN_INPUT_PULLUP | MUX_MODE0)*/ /* spi0_cs1.spi0_cs1 */
0x160 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* spi0_cs1.gpio0_6 */
0x50 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a4.gpio1_20 - as cs2 */
>;
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins_default>;
ti,spi-num-cs = <3>;
cs-gpios = <0>, <&gpio0 6 0>, <&gpio1 20 0>;
status = "okay";
nvm@0 {
compatible = "atmel,at25", "st,m950x0";
reg = <1>;
spi-max-frequency = <14000000>;
pagesize = <8>;
size = <0x200>;
address-width = <8>;
at25,addr-mode = <0xB1>;
at25,name = "FM25L04B";
};
};
dmesg:
[ 0.849258] of_get_named_gpiod_flags: can't parse gpios property of node '/ocp/spi@48030000[0]'
[ 0.858205] of_get_named_gpiod_flags exited with status 0
[ 0.863661] of_get_named_gpiod_flags exited with status 0
