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DM3725, DSP processor gets locked during SDMA transfer

Prodigy 40 points

Replies: 2

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Hi,

I am using DM3725 media processor for one my Telecom project. I have come across weird situation and I want to discuss more about it.

I am using SDMA hardware synchronized transfer between SPI port and slow memory(SDRAM). The code runs on DSP. I have observed that during SDMA transfer, DSP gets locked. DSP becomes active only after SDMA transfer is done. Means after a block transfer.

Is it expected behavior? If so why is this behavior and what could be the reason? And does it happen same if I run SDMA under ARM? Means if the code runs on ARM? Or  does it only happen between DSP and SDMA? Could somebody answer?

Regards

Ganapati Hegde

2 Replies

  • Hi Ganapati,

    As I understand the issue the described behaviour is not expected in general. Could you specify is the problem appears for short period of time or it appears during the whole time while using the SDMA?

    BR
    Tsvetolin Shulev
  • In reply to Cvetolin Shulev-XID:

    Hi Tsvetolin,

    When there is continues data on SPI port and SPI clock runs at 24MHz and more, this behavior is seen. Also in our case DMA happens as element sync ie for every 4 byte. We partially arrived to solution to this problem. As both DSP and SDMA were supposed to access SDRAM, we figured out that there was L3 lock. One reason could be, we did not alter SDRC arbitration class priorities and we had continued it by keeping default.

    Temporarily this issue is resolved now by increasing L3 clock freq. Earlier L3 was running at 166MHz, now we made it running at 197.6MHz and the issue is resolved.

    Could you please comment could our understanding be correct by looking at this scenario? Please suggest if anything else to be taken care.

    Regards
    Ganapati Hegde

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