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Any reason why SYSBOOT value would change unexpected ?

Other Parts Discussed in Thread: AM3354

Our design with the AM3354 (> 30 k in the field) has resistors on the LCD bus to configure SYSBOOT, all works fine.

 

But recently we got 3 reports of devices not booting (we call them black screens), only solution is to switch power for 30 seconds.

The reset button doesn’t work in this situation, the reset button is connected to /WARMRST, so in this situation SYSBOOT isn’t updated ?

 

I finely got a failing device on my desk from the field in this state, it was put on battery backup power during transportation.

All voltage where ok and the 26MHz clock was running, reset button didn’t work.

 

With the JTAG and a XDS200 I could connect to the AM3354 and found SYSBOOT to be 0x00000300 ???

I could also reset (HW and SW) the AM3354 with the JTAG (CC studio) and it was running ROM code but no debug output.

 

Running the script also confirmed the faulty SYSBOOT value :

 

CONTROL: device_id = 0x2b94402e

* AM335x family

* Silicon Revision 2.1

 

PRM_DEVICE: PRM_RSTST = 0x00000021

* Bit 0 : GLOBAL_COLD_RST

* Bit 5 : EXTERNAL_WARM_RST

 

CONTROL: control_status = 0x00000300

* SYSBOOT[15:14] = 00b (19.2 MHz)

* SYSBOOT[11:10] = 00b No GPMC CS0 addr/data muxing

* Device Type = General Purpose (GP)

* SYSBOOT[7:6] = 00b MII (EMAC boot modes only)

* SYSBOOT[5] = 0 CLKOUT1 disabled

* RESERVED BOOT SEQUENCE!

 

ROM: Current tracing vector, word 1 = 0x00000006

* Bit 1 : [General] Entered main function

* Bit 2 : [General] Running after the cold reset

 

ROM: Current tracing vector, word 1 = 0x00000000

 

ROM: Current tracing vector, word 1 = 0x00000000

 

ROM: Current copy of PRM_RSTST = 0x00000000

 

ROM: Cold reset tracing vector, word 1 = 0x00000000

 

ROM: Cold reset tracing vector, word 1 = 0x00000000

 

ROM: Cold reset tracing vector, word 1 = 0x00000021

* Bit 0 : [Memory Boot] Memory booting device NULL

* Bit 5 : [Memory Boot] Memory booting device MMCSD0

 

Cortex A8 Program Counter = 0x00021408 R0 = 0x00000000 R1 = 0x44e00000

 

Should issuing a HW reset from CC studio on the JTAG not make SYSBOOT be updated ?

Finally I switched off the power for 30 sec and on again, yes all performed well again.

 

 

What are the possible reasons for SYSBOOT the be incorrect please ?

 

Ps : got dump off all registers and SRAM memory.

  • Hi Steve,

    SYSBOOT pin values are latched ONLY on external power-on reset rising edge (AM335X pin PWRONRSTn). See Table 8-25 from the AM335X TRM Rev. M.
  • Ok, so HW reset from JTAG will not force an update.  

    - SYSBOOT latching is a pure hardware function, no way software can overwrite the register ?

    But why should I read the value 0x00000300 out of SYSBOOT ?

    - Design fault ?  Works on 30k devices already in the field and after power off/on also on this device !

    - Pullup voltage not ok ?  SYSBOOT is 0x0300 instead of 0x0C17, some bit wrongly low other wrong high !

    Can a supply problem (power glitch, voltage to low) to the AM3354 make it latch wrong values ?  If so which powerlines are involved please ?

  • Steve Deschryver said:
    - SYSBOOT latching is a pure hardware function, no way software can overwrite the register ?

    Correct, this register is read-only.

    Steve Deschryver said:
    But why should I read the value 0x00000300 out of SYSBOOT ?
    - Design fault ?  Works on 30k devices already in the field and after power off/on also on this device !
    - Pullup voltage not ok ?  SYSBOOT is 0x0300 instead of 0x0C17, some bit wrongly low other wrong high !
    Can a supply problem (power glitch, voltage to low) to the AM3354 make it latch wrong values ?  If so which powerlines are involved please?

    I do suspect a short glitch on the reset line could cause this. I don't know what is the operating mode functionality of your SYSBOOT lines, but theoretically a short glitch on the reset line could cause false values to be latched, due to the lines not having time to settle to their SYSBOOT state.

  • One last question mr Biser,

     Does SYSBOOT have a default value ?

     Why I ask, I tested our design in case the power wasn't steady but could only get low levels (0 bits in SYSBOOT) and never a false high bit (like the 3 in 0x0300). All these SYSBOOT lines are connected to inputs, some are pull-up weakly high, but nothing else that could drive these lines high.

    Regards,

    Steve

  • No, SYSBOOT values depend entirely on what is latched from the pins at reset release time.