• TI Thinks Resolved

Linux: Firmware crashes during EDMA access

Hi,

I want to use the EDMA. When I initialize the EDMA the firmware chrashes if it want to read or write at address 0x63300000.

Here is my Code:

// EDMA wakeup dependency enable
   HW_WR_REG32(SOC_CORE_CM_CORE_BASE + PM_L3MAIN1_TPTC1_WKDEP, 0x1);
   while( ((HW_RD_REG32(SOC_CORE_CM_CORE_BASE + PM_L3MAIN1_TPTC1_WKDEP) & 0x00030000U) != 0x0U) && (u32_cnt < EDMA3_MAX_WKUPDEP_CNT))
   {
      u32_cnt++;
   }

   u32_cnt = 0;
   HW_WR_REG32(SOC_CORE_CM_CORE_BASE + PM_L3MAIN1_TPTC2_WKDEP, 0x1);
   while( ((HW_RD_REG32(SOC_CORE_CM_CORE_BASE + PM_L3MAIN1_TPTC2_WKDEP) & 0x00030000U) != 0x0U) && (u32_cnt < EDMA3_MAX_WKUPDEP_CNT))
   {
      u32_cnt++;
   }

   u32_cnt = 0;
   HW_WR_REG32(SOC_CORE_CM_CORE_BASE + PM_L3MAIN1_TPCC_WKDEP, 0x1);
   while( ((HW_RD_REG32(SOC_CORE_CM_CORE_BASE + PM_L3MAIN1_TPCC_WKDEP) & 0x00030000U) != 0x0U) && (u32_cnt < EDMA3_MAX_WKUPDEP_CNT))
   {
      u32_cnt++;
   }

   /* Do EDMA init Done once in the beginning of application */
   EDMAsetRegion(EDMA3_CC_REGION);
   EDMA3Init(SOC_EDMA_TPCC_BASE_VIRT, EDMA3_EVT_QUEUE); -->Inside this function it crashes if its access 0x63300000 address

Inside of EDMA3Init() at first line :   HW_WR_REG32(baseAddr + EDMA_TPCC_EMCR, EDMA3_SET_ALL_BITS); it crashes due to 0x63300000 address access.

My dts-file:

&edma {
status = "okay";
};
&edma_tptc0 {
status = "okay";
};
&edma_tptc1 {
status = "okay";
};

Any suggestion?

  • Hi Andreas,

    You need to set up AMMU for accessing EDMA via 0x6x address.
    But that is for M4.
    On A15 you should access EDMA from 0x4x address.

    Regards,
    Rishabh
  • Hi Andreas,

    can you clarify which processor and SDK you use?

    Thanks,
    Yordan
  • In reply to Rishabh Garg:

    Where can I find an example to setup AMMU? I am trying to access EDMA on the M4.

  • In reply to Rishabh Garg:

    Is it not possible to setup AMMU over dts-file?

    I am using the TDA2px.

  • In reply to Andreas Vogt57:

    Hi Andreas,

    You can write to AMMU registers using HW_WR_REG32.
    I have pinged a linux expert to help you on setting AMMU using dts.

    Regards,
    Rishabh
  • In reply to Andreas Vogt57:

    How I have to configure EDMA?

    How to configure resource table, with devmem or carveout?

    #define L3_MAIN_EDMA_TPCC 0x63300000
    #define IPU_MAIN_EDMA_TPCC 0x63300000
    #define L3_MAIN_EDMA_TPCC_SIZE (SZ_1M *3U)

    {
    TYPE_DEVMEM,
    L3_MAIN_EDMA_TPCC, IPU_MAIN_EDMA_TPCC,
    L3_MAIN_EDMA_TPCC_SIZE, 0, 0, "IPU_MEM_DATAxxx",
    },

    How to configure the AMMU, I found the following code but is it always valid?

    void StwUtils_appConfigIPU1DefaultAMMU(void)
    {
    ammuPageConfig_t pageConfig = {0U};
    
    /* 0th large page mapping: P.A. 0x40000000U V.A 0x40000000U */
    pageConfig.ammuPageType = AMMU_PAGE_TYPE_LARGE;
    pageConfig.ammuPageNum = 0U;
    pageConfig.policyRegVal = 0x00000007;
    pageConfig.physicalAddress = 0x40000000U;
    pageConfig.logicalAddress = 0x40000000U;
    AMMUConfigPage(SOC_IPU1_UNICACHE_MMU_BASE, &pageConfig);
    
    /* 1st large page mapping: P.A. 0x80000000U V.A 0x80000000U */
    pageConfig.ammuPageType = AMMU_PAGE_TYPE_LARGE;
    pageConfig.ammuPageNum = 1U;
    pageConfig.policyRegVal = 0x000B0007;
    pageConfig.physicalAddress = 0x80000000U;
    pageConfig.logicalAddress = 0x80000000U;
    AMMUConfigPage(SOC_IPU1_UNICACHE_MMU_BASE, &pageConfig);
    
    /* 2nd large page mapping: P.A. 0xA0000000U V.A 0xA0000000U */
    pageConfig.ammuPageType = AMMU_PAGE_TYPE_LARGE;
    pageConfig.ammuPageNum = 2U;
    pageConfig.policyRegVal = 0x00020007;
    pageConfig.physicalAddress = 0xA0000000U;
    pageConfig.logicalAddress = 0xA0000000U;
    AMMUConfigPage(SOC_IPU1_UNICACHE_MMU_BASE, &pageConfig);
    
    /* 3rd large page mapping: P.A. 0x40000000U V.A 0x60000000U */
    pageConfig.ammuPageType = AMMU_PAGE_TYPE_LARGE;
    pageConfig.ammuPageNum = 3U;
    pageConfig.policyRegVal = 0x00000007;
    pageConfig.physicalAddress = 0x40000000U;
    pageConfig.logicalAddress = 0x60000000U;
    AMMUConfigPage(SOC_IPU1_UNICACHE_MMU_BASE, &pageConfig);
    
    /* 0th small page mapping: P.A. 0x55020000U V.A. 0x00000000U */
    pageConfig.ammuPageType = AMMU_PAGE_TYPE_SMALL;
    pageConfig.policyRegVal = 0x0001000B;
    pageConfig.ammuPageNum = 0;
    pageConfig.logicalAddress = 0x00000000U;
    pageConfig.physicalAddress = 0x55020000U;
    AMMUConfigPage(SOC_IPU1_UNICACHE_MMU_BASE, &pageConfig);
    
    /* 1st small page mapping: P.A. 0x55080000U V.A. 0x40000000U */
    pageConfig.ammuPageType = AMMU_PAGE_TYPE_SMALL;
    pageConfig.policyRegVal = 0x0000000B;
    pageConfig.ammuPageNum = 1;
    pageConfig.logicalAddress = 0x40000000U;
    pageConfig.physicalAddress = 0x55080000U;
    AMMUConfigPage(SOC_IPU1_UNICACHE_MMU_BASE, &pageConfig);
    }

  • In reply to Andreas Vogt57:

    Hi Andreas,

    Can you look at the below thread on how to configure EDMA in linux:
    e2e.ti.com/.../2679900

    Regards,
    Rishabh
  • In reply to Andreas Vogt57:

    Hi Andreas,

    Yes you can use this code to configure AMMU.
    This code caters to most of mappings needed although you will need to make changes if you want to access NOR flash.

    Regards,
    Rishabh
  • In reply to Rishabh Garg:

    Hi,
    i am still confused which addresses I need , why is there 0x40000000U, 0x80000000? For example the address 0x40000000 is reserved (see page 454 TDA2px TRM)

    Regard
    Andreas
  • In reply to Andreas Vogt57:

    Hi Andreas,

    When you map 0x4000_0000, you are mapping whole 512 MB space till 0x5FFF_FFFF. Reserved areas still remain reserved.
    Can you look up ARM documentation to understand more on AMMU.

    Regards,
    Rishabh