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AM4379: Flexibility of ICSS0.PRU0 EnDAT terminals

Hideaki Nambu
Mastermind 9125 points
Part Number: AM4379
Other Parts Discussed in Thread: TIDEP0050

Hello,

My customer is working on a floor plan of the EnDAT pins.

Also we are reading TIDEP0050 tidual5.pdf.

As long as the PinMuxTool tells, for example, the # of candidates for the ENDAT0_CLK terminal is two. N24 or AD24.
Is that correct?

I expected the EnDAT pins are manipulated fully by firmware so the floor plan is very flexible.

  • 0
    TI__Genius 10415 points

    Hi,

    The EnDat encoder is actually connected to the 'Peripheral Interface' in the PRU-ICSS. This 'Peripheral Interface' is documented in the AM437x TRM (http://www.ti.com/lit/pdf/spruhl7h) in section 30.4.1.2.6. There is an internal mux in the PRU-ICSS that selects between exposing the PRU-ICSS GPIO signals or the 'Peripheral Interface' signals (or the SD signals, or the MII signals). Table 30-21 shows how the 'Peripheral Interface' signals are overlayed on top of the PRU-ICSS GPIO pins.

    From that table you can see that in your specific case, ENDAT0_CLK(pr0_pru0_gpo[0]), the signal is muxed on top of only the pr0_pru0_gpo0 pin which is N24. If you were to click on the AD24 selection then it would actually switch from using PRU0 to PRU1 pins for the full interface as AD24 is pr0_pru1_gpo0.

    Jason Reeder