TMS320DM8168: Please confirm my HD-sdi interfacing is correct or not? and to this video i can apply video codec or not?

Hi Jitendra,

I can comment from HW side. Your HD-SDI.pdf block diagram seems to be correct for 16-bit YCbCr capture mode with embedded syncs.

For receiving part, you can use Video Input 0 Port A:
- VIN[0]A_CLK - Video Input 0 Port A Clock input. Input clock for 8-bit, 16-bit, or 24-bit Port A video capture.
- VIN[0]A_D[15] to VIN[0]A_D[0] - Video Input 0 Port A Data inputs. For 16-bit capture, D[7:0] are Cb/Cr and [15:8] are Y Port A inputs.

When you receive the video in HDVPSS through the VIN[0]A port, you can pass the video data to the HDVICP2 to apply video codec functions on that data (i.e H.264, MPEG-2, VC-1, etc). Then you can transfer the encoded data from HDVICP2 to HDVPSS VOUT port.

From HDVPSS VOUT port you can output the data through the VOUT0 channel. You can output (i.e.) 20-bit G/Y/YC video data in embedded sync mode through below pins:
- VOUT[0]_CLK - Video Output 0 Clock output
- VOUT[0]_G_Y_YC[9:2] - These signals represent the 8 MSBs of G/Y/YC video data.
- VOUT[0]_G_Y_YC[1:0] - These signals represent the 2 LSBs of G/Y/YC video data
- VOUT[0]_B_CB_C[9:2] - These signals represent the 8 MSBs of B/CB/C video data
- VOUT[0]_B_CB_C[1:0] - These signals represent the 2 LSBs of B/CB/C video data

In your HD-SDI.pdf you have D[20:0] for outputm while for "20-bit G/Y/YC video data in embedded sync mode" you need D[19:0]

Regards,
Pavel