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66AK2L06: Linux and bare metal DSP communication

Yurii Monakov
Intellectual 660 points
Part Number: 66AK2L06

Hi All!

We have a custom board with TCI6630K2L running Linux-RT OS on ARM and digital signal processing application on bare metal c66x cores.

Application dataflow is as follows:

  1. Get notification from PCIe endpoint (FPGA)
  2. Read data from PCIe EP
  3. Process data on c66x cores
  4. Notify Linux application with results

I know about IPC examples, but they are SYS/BIOS-based and too high-level to understand hardware internals.

What is the best way of communication (in point of hardware) between Linux ARM and bare metal DSPs?

Yurii

PS. Currently we use only ARM cores for all digital signal processing, but we have performance problems (high CPU load, high interrupt latency, etc.).

  • 0
    TI__Guru**** 161600 points

    Hi Yurii,

    You could try using shared memory to exchange data between ARM & DSP. Take a look at this e2e thread:
       

    Also there is OpenCL, see:

    Best Regards,

    Yordan

  • 0 in reply to Yordan Kovachev
    Intellectual 660 points

    Hi Yordan,

    Thank you for the answer.

    Yordan Kovachev said:
    You could try using shared memory

    Yes, I can use 2MB MCSM to hold shared data. I've searched for notification part of question yesterday and this is what I'm going to implement:

    1. Load DSP cores with custom Linux driver
    2. Route MSI0 interrupt to DSP Core0
    3. Core0 starts QDMA over PCIe to MCSM
    4. When data is ready, notify all DSP cores to start processing
    5. Each core read data from MCSM with QDMA and process it
    6. Processed data is written back to MCSM, Core0 notified
    7. When all cores are done, notify ARM cores

    This is preliminary workflow. And I have some questions regarding implementation.

    1. Can MSI0 be simultaneously routed to ARM and DSP?
    2. Can I independently (without explicit synchronization) access PCIe data region from Linux and DSP?
    3. What is the best way of core-to-core notification? I've found IPCGRn, but not sure if it fits.
    4. Is there some separate Semaphore2 driver for Linux to synchronize DSP/ARM?
    5. How can I optimize this workflow in your point of view?

    Yordan Kovachev said:
    IPC communication between ARM and DSP using Shared Memory

    In fact I'm not able to use Processor SDK directly. Our board is very custom. I have only 32 MB on SPI flash and minimal SDK image that I was capable to compile was 44 MB (with some dirty hacks). The next problem is the kernel, U-Boot and device tree. I have to make a lot of source-level changes (especially to U-Boot and DT) to start kernel with all needed peripherals working correctly. You can look at my previous posts with encountered problems and this is just tip of the iceberg.


    So I'm using buildroot to generate my embedded Linux system (which is only 7 MB UBI image). I've tried to add TI packages to buildroot (like mpm-transport), but it turns out that there are too many dependencies to resolve. bitbake dependency graphs are so cumbersome, that I'm not able to find direct dependencies of TI's recipes. It will be great to have some manual on how to customize processor SDK build. For example, there is Linux Test Project package in SDK, which is definitely not needed in production, but it roughly doubles minimal image size.

    Yurii

  • 0 in reply to Yurii Monakov
    TI__Guru 50170 points

    Hi, Yurii,

    You may want to consider using IPCGR registers in Keystone-II device (K2L). Please take a look at section 9.2.3.15 in the K2L datasheet. Do you think the IPCGR is useful to your case?

    http://www.ti.com/lit/ds/symlink/66ak2l06.pdf

    9.2.3.15 IPC Generation (IPCGRx) Registers

    The IPCGRx Registers facilitate inter-C66x CorePac interrupts. The 66AK2L06 device has six IPCGRx registers (IPCGR0 through IPCGR3 and IPCGR8 and IPCGR9). These registers can be used by external hosts or CorePacs to generate interrupts to other CorePacs. A write of 1 to the IPCG field of the IPCGRx register generates an interrupt pulse to the:

    • C66x CorePacx (0 <= x <= 3)

    • ARM CorePac core (8<=x<=9)

    Rex

  • 0 in reply to Rex Chang
    Intellectual 660 points

    Hi Rex,

    Thank you for the answer. I think that using IPC Generation Registers will be enough for my application.

    What do you think about IPCGR drivers implementation? Is there anything similar in Linux PSDK?

    Yurii

  • 0 in reply to Yurii Monakov
    TI__Guru 50170 points

    HI, Yurii,

    Please take a look at the nodes of dspgpio0-4 in keystone-k2l.dtsi. 

    Rex

  • 0 in reply to Rex Chang
    TI__Guru 50170 points

    I meant dspgpio0-3. Sorry.

  • 0 in reply to Rex Chang
    Intellectual 660 points

    Thank you Rex, I'll take a look.

    Yurii