This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

  • TI Thinks Resolved

TMS320C6652: DDR unused- Clock

Intellectual 380 points

Replies: 2

Views: 107

Part Number: TMS320C6652

Hi,

From the keystone Hardware guide, it is mentioned that unused LVDS clock can be terminated.

So is that the same case with DDRCLK ? I am not using DDR for processor .

Datasheet Pg 73 Power sequencing shows the DDRCLK . Does the DDRCLK required for intial boot up or it can be left terminated as per LVDS unused recommendation?

Please clarify

Regards,

Divy

  • Divy,

    Please see notes under '6.3.1 Power-Supply Sequencing' of the C6654/2 Data Manual:

    The clock input buffers for CORECLK, DDRCLK, SGMIICLK (C6654 only), and PCIECLK (C6654 only) use only CVDD as a supply voltage. These clock inputs are not fail-safe and must be held in a highimpedance state until CVDD is at a valid voltage level. Driving these clock inputs high before CVDD is valid could cause damage to the device. Once CVDD is valid it is acceptable that the P and N legs of these CLKs may be held in a static state (either high and low or low and high) until a valid clock frequency is needed at that input. To avoid internal oscillation the clock inputs should be removed from the high impedance state shortly after CVDD is present.

    Tom

     

  • In reply to Tom Johnson 16214:

    Divy,

    However, note that there is a known issue with this device when you are operating without DDR.  You still need to provide a clock to the DDR to allow the logic to properly initialize.  Otherwise the DDR controller and PHY logic will draw more power than expected.

    Tom

     

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.